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authorLinus Torvalds <torvalds@linux-foundation.org>2019-05-24 18:12:46 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2019-05-24 18:12:46 +0200
commita3b25d157d5a52ef3f9296a739ee28f5d36e8968 (patch)
tree5359f2589f5ee25bb4532b6692364f1940f65817 /drivers/gpu/drm/gma500
parentMerge tag 'xfs-5.2-fixes-1' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux (diff)
parentRevert "drm/amd/display: Don't load DMCU for Raven 1" (diff)
downloadlinux-a3b25d157d5a52ef3f9296a739ee28f5d36e8968.tar.xz
linux-a3b25d157d5a52ef3f9296a739ee28f5d36e8968.zip
Merge tag 'drm-fixes-2019-05-24-1' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "Nothing too unusual here for rc2. Except the amdgpu DMCU firmware loading fix caused build breakage with a different set of Kconfig options. I've just reverted it for now until the AMD folks can rewrite it to avoid that problem. i915: - boosting fix - bump ready task fixes - GVT - reset fix, error return, TRTT handling fix amdgpu: - DMCU firmware loading fix - Polaris 10 pci id for kfd - picasso screen corruption fix - SR-IOV fixes - vega driver reload fixes - SMU locking fix - compute profile fix for kfd vmwgfx: - integer overflow fixes - dma sg fix sun4i: - HDMI phy fixes gma500: - LVDS detection fix panfrost: - devfreq selection fix" * tag 'drm-fixes-2019-05-24-1' of git://anongit.freedesktop.org/drm/drm: (32 commits) Revert "drm/amd/display: Don't load DMCU for Raven 1" drm/panfrost: Select devfreq drm/gma500/cdv: Check vbt config bits when detecting lvds panels drm/vmwgfx: integer underflow in vmw_cmd_dx_set_shader() leading to an invalid read drm/vmwgfx: NULL pointer dereference from vmw_cmd_dx_view_define() drm/vmwgfx: Use the dma scatter-gather iterator to get dma addresses drm/vmwgfx: Fix compat mode shader operation drm/vmwgfx: Fix user space handle equal to zero drm/vmwgfx: Don't send drm sysfs hotplug events on initial master set drm/i915/gvt: Fix an error code in ppgtt_populate_spt_by_guest_entry() drm/i915/gvt: do not let TRTTE and 0x4dfc write passthrough to hardware drm/i915/gvt: add 0x4dfc to gen9 save-restore list drm/i915/gvt: Tiled Resources mmios are in-context mmios for gen9+ drm/i915/gvt: use cmd to restore in-context mmios to hw for gen9 platform drm/i915/gvt: emit init breadcrumb for gvt request drm/amdkfd: Fix compute profile switching drm/amdgpu: skip fw pri bo alloc for SRIOV drm/amd/powerplay: fix locking in smu_feature_set_supported() drm/amdgpu/gmc9: set vram_width properly for SR-IOV drm/amdgpu/soc15: skip reset on init ...
Diffstat (limited to 'drivers/gpu/drm/gma500')
-rw-r--r--drivers/gpu/drm/gma500/cdv_intel_lvds.c3
-rw-r--r--drivers/gpu/drm/gma500/intel_bios.c3
-rw-r--r--drivers/gpu/drm/gma500/psb_drv.h1
3 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
index de9531caaca0..9c8446184b17 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
@@ -594,6 +594,9 @@ void cdv_intel_lvds_init(struct drm_device *dev,
int pipe;
u8 pin;
+ if (!dev_priv->lvds_enabled_in_vbt)
+ return;
+
pin = GMBUS_PORT_PANEL;
if (!lvds_is_present_in_vbt(dev, &pin)) {
DRM_DEBUG_KMS("LVDS is not present in VBT\n");
diff --git a/drivers/gpu/drm/gma500/intel_bios.c b/drivers/gpu/drm/gma500/intel_bios.c
index 63bde4e86c6a..e019ea271ffc 100644
--- a/drivers/gpu/drm/gma500/intel_bios.c
+++ b/drivers/gpu/drm/gma500/intel_bios.c
@@ -436,6 +436,9 @@ parse_driver_features(struct drm_psb_private *dev_priv,
if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
dev_priv->edp.support = 1;
+ dev_priv->lvds_enabled_in_vbt = driver->lvds_config != 0;
+ DRM_DEBUG_KMS("LVDS VBT config bits: 0x%x\n", driver->lvds_config);
+
/* This bit means to use 96Mhz for DPLL_A or not */
if (driver->primary_lfp_id)
dev_priv->dplla_96mhz = true;
diff --git a/drivers/gpu/drm/gma500/psb_drv.h b/drivers/gpu/drm/gma500/psb_drv.h
index 941b238bdcc9..bc608ddc3bd1 100644
--- a/drivers/gpu/drm/gma500/psb_drv.h
+++ b/drivers/gpu/drm/gma500/psb_drv.h
@@ -537,6 +537,7 @@ struct drm_psb_private {
int lvds_ssc_freq;
bool is_lvds_on;
bool is_mipi_on;
+ bool lvds_enabled_in_vbt;
u32 mipi_ctrl_display;
unsigned int core_freq;