diff options
| author | Andi Shyti <andi@etezian.org> | 2019-10-24 23:16:41 +0200 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-10-26 20:28:59 +0200 |
| commit | 3e7abf8141935ded77abeb622480bf4a14241ece (patch) | |
| tree | f0a15dd5521fa3b0a98212cc2100e7365055a411 /drivers/gpu/drm/i915/Makefile | |
| parent | drm/i915/tgl: Adjust the location of RING_MI_MODE in the context image (diff) | |
| download | linux-3e7abf8141935ded77abeb622480bf4a14241ece.tar.xz linux-3e7abf8141935ded77abeb622480bf4a14241ece.zip | |
drm/i915: Extract GT render power state management
i915_irq.c is large. One reason for this is that has a large chunk of
the GT render power management stashed away in it. Extract that logic
out of i915_irq.c and intel_pm.c and put it under one roof.
Based on a patch by Chris Wilson.
Signed-off-by: Andi Shyti <andi.shyti@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191024211642.7688-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/Makefile')
| -rw-r--r-- | drivers/gpu/drm/i915/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 2f64db45f8e0..526f881325c8 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -95,6 +95,7 @@ gt-y += \ gt/intel_reset.o \ gt/intel_ring.o \ gt/intel_ring_submission.o \ + gt/intel_rps.o \ gt/intel_sseu.o \ gt/intel_timeline.o \ gt/intel_workarounds.o |