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| author | Michel Thierry <michel.thierry@intel.com> | 2019-08-23 10:20:34 +0200 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2019-08-23 19:08:55 +0200 |
| commit | 5d86923060fce88a4dda8d8c9c5d5eb32f37c37b (patch) | |
| tree | 7cc89bd6dcca1d18158b97dd87b9de85032ddfaf /drivers/gpu/drm/i915/i915_debugfs.c | |
| parent | drm/i915/tgl: Move GTCR register to cope with GAM MMIO address remap (diff) | |
| download | linux-5d86923060fce88a4dda8d8c9c5d5eb32f37c37b.tar.xz linux-5d86923060fce88a4dda8d8c9c5d5eb32f37c37b.zip | |
drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating
HCP/MFX power gating is disabled by default, turn it on for the vd units
available. User space will also issue a MI_FORCE_WAKEUP properly to
wake up proper subwell.
During driver load, init_clock_gating happens after device_info_init_mmio
read the vdbox disable fuse register, so only present vd units will have
these enabled.
BSpec: 14214
HSDES: 1209977827
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Tony Ye <tony.ye@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823082055.5992-3-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_debugfs.c')
0 files changed, 0 insertions, 0 deletions