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author | Satheeshakrishna M <satheeshakrishna.m@intel.com> | 2015-03-17 10:39:29 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-09 15:57:46 +0200 |
commit | 1feed8855d168482bb9e6faa0ba0f1f257e62514 (patch) | |
tree | b045d5cc811dca1e836dd77357f1cd8639d6b054 /drivers/gpu/drm/i915/i915_drv.h | |
parent | drm/i915: use proper FBC base register on all new platforms (diff) | |
download | linux-1feed8855d168482bb9e6faa0ba0f1f257e62514.tar.xz linux-1feed8855d168482bb9e6faa0ba0f1f257e62514.zip |
drm/i915/bxt: Add IS_BROXTON macro
Adding IS_BROXTON macro for broxton specific implementation.
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e326ac9730cf..8341f0f2299f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2306,6 +2306,7 @@ struct drm_i915_cmd_table { #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell) #define IS_BROADWELL(dev) (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev)) #define IS_SKYLAKE(dev) (INTEL_INFO(dev)->is_skylake) +#define IS_BROXTON(dev) (!INTEL_INFO(dev)->is_skylake && IS_GEN9(dev)) #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \ (INTEL_DEVID(dev) & 0xFF00) == 0x0C00) |