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| author | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2019-06-07 00:42:24 +0200 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-06-09 12:21:33 +0200 |
| commit | 33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1 (patch) | |
| tree | 45bee7402d3af6ab7406d1acdbecaa3377229038 /drivers/gpu/drm/i915/i915_drv.h | |
| parent | drm/i915/dsi: Read back pclk set by GOP and use that as pclk (v3) (diff) | |
| download | linux-33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1.tar.xz linux-33ec6c9eb35e6bcf60b5a134d8e8e1ed836a0bc1.zip | |
drm/i915/guc: always use Command Transport Buffers
Now that we've moved the Gen9 GuC blobs to version 32 we have CTB
support on all gens, so no need to restrict the usage to Gen11+.
Note that MMIO communication is still required for CTB initialization.
v2: fix commit message nits (Michal)
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190606224225.14287-1-daniele.ceraolospurio@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index dfe4b11ee423..82e55c65289a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2393,7 +2393,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, * properties, so we have separate macros to test them. */ #define HAS_GUC(dev_priv) (INTEL_INFO(dev_priv)->has_guc) -#define HAS_GUC_CT(dev_priv) (INTEL_INFO(dev_priv)->has_guc_ct) #define HAS_GUC_UCODE(dev_priv) (HAS_GUC(dev_priv)) #define HAS_GUC_SCHED(dev_priv) (HAS_GUC(dev_priv)) |