diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-20 18:47:17 +0100 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-31 16:00:44 +0100 |
commit | 0bb94e03834eaa9d5925b259ea140e53fdf68cfb (patch) | |
tree | fa6afc196f041269ff402501db82785b89bbb6b0 /drivers/gpu/drm/i915/i915_drv.h | |
parent | drm/i915: s/need_cd2x_updare/can_cd2x_update/ (diff) | |
download | linux-0bb94e03834eaa9d5925b259ea140e53fdf68cfb.tar.xz linux-0bb94e03834eaa9d5925b259ea140e53fdf68cfb.zip |
drm/i915: s/cdclk_state/cdclk_config/
I want to have a higher level cdclk state object so let's rename
the current lower level thing to cdclk_config (because I lack
imagination).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-8-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 035e8fdc96ec..7baf1e740eff 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -253,18 +253,18 @@ struct sdvo_device_mapping { struct intel_connector; struct intel_encoder; struct intel_atomic_state; +struct intel_cdclk_config; struct intel_crtc_state; struct intel_initial_plane_config; struct intel_crtc; struct intel_limit; struct dpll; -struct intel_cdclk_state; struct drm_i915_display_funcs { void (*get_cdclk)(struct drm_i915_private *dev_priv, - struct intel_cdclk_state *cdclk_state); + struct intel_cdclk_config *cdclk_config); void (*set_cdclk)(struct drm_i915_private *dev_priv, - const struct intel_cdclk_state *cdclk_state, + const struct intel_cdclk_config *cdclk_config, enum pipe pipe); int (*get_fifo_size)(struct drm_i915_private *dev_priv, enum i9xx_plane_id i9xx_plane); @@ -878,7 +878,7 @@ struct intel_wm_config { bool sprites_scaled; }; -struct intel_cdclk_state { +struct intel_cdclk_config { unsigned int cdclk, vco, ref, bypass; u8 voltage_level; }; @@ -1009,17 +1009,17 @@ struct drm_i915_private { */ struct { /* - * The current logical cdclk state. + * The current logical cdclk configuration. * See intel_atomic_state.cdclk.logical */ - struct intel_cdclk_state logical; + struct intel_cdclk_config logical; /* - * The current actual cdclk state. + * The current actual cdclk configuration. * See intel_atomic_state.cdclk.actual */ - struct intel_cdclk_state actual; - /* The current hardware cdclk state */ - struct intel_cdclk_state hw; + struct intel_cdclk_config actual; + /* The current hardware cdclk configuration */ + struct intel_cdclk_config hw; /* cdclk, divider, and ratio table from bspec */ const struct intel_cdclk_vals *table; |