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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-20 18:47:15 +0100 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-01-31 16:00:43 +0100 |
commit | b4db3a8c689ba5f5ced764ab1377ad6411003b0b (patch) | |
tree | 5b747654037e8c6b7ba716bbb458f2d47badac03 /drivers/gpu/drm/i915/i915_drv.h | |
parent | drm/i915: Move more cdclk state handling into the cdclk code (diff) | |
download | linux-b4db3a8c689ba5f5ced764ab1377ad6411003b0b.tar.xz linux-b4db3a8c689ba5f5ced764ab1377ad6411003b0b.zip |
drm/i915: Collect more cdclk state under the same roof
Move the min_cdclk[] and min_voltage_level[] arrays under the
rest of the cdclk state. And while at it provide a simple
helper (intel_cdclk_clear_state()) to clear the state during
the ww_mutex backoff dance.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200120174728.21095-6-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_drv.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 0f7095393365..035e8fdc96ec 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1025,6 +1025,11 @@ struct drm_i915_private { const struct intel_cdclk_vals *table; int force_min_cdclk; + + /* minimum acceptable cdclk for each pipe */ + int min_cdclk[I915_MAX_PIPES]; + /* minimum acceptable voltage level for each pipe */ + u8 min_voltage_level[I915_MAX_PIPES]; } cdclk; /** @@ -1085,10 +1090,6 @@ struct drm_i915_private { * any crtc lock is sufficient, for writing must hold all of them. */ u8 active_pipes; - /* minimum acceptable cdclk for each pipe */ - int min_cdclk[I915_MAX_PIPES]; - /* minimum acceptable voltage level for each pipe */ - u8 min_voltage_level[I915_MAX_PIPES]; int dpio_phy_iosf_port[I915_NUM_PHYS_VLV]; |