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| author | Carlos Santa <carlos.santa@intel.com> | 2016-08-17 21:30:39 +0200 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-09-08 01:07:08 +0200 |
| commit | 4aa4c23f2be22456070ee02eb50db84c0598c3ed (patch) | |
| tree | 2ad12320852d75ca24ead7f2f0e30e15d1a22293 /drivers/gpu/drm/i915/i915_pci.c | |
| parent | drm/i915: Introduce GEN6_FEATURES for device info (diff) | |
| download | linux-4aa4c23f2be22456070ee02eb50db84c0598c3ed.tar.xz linux-4aa4c23f2be22456070ee02eb50db84c0598c3ed.zip | |
drm/i915: Move HAS_RUNTIME_PM definition to platform
Moving all GPU features to the platform struct definition allows for
- standard place when adding new features from new platforms
- possible to see supported features when dumping struct
definitions
Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index bdc207131ab7..d1f5a9a9ee16 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -199,6 +199,7 @@ static const struct intel_device_info intel_ironlake_m_info = { .gen = 6, .num_pipes = 2, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .has_fbc = 1, \ + .has_runtime_pm = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .has_llc = 1, \ GEN_DEFAULT_PIPEOFFSETS, \ @@ -242,6 +243,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { #define VLV_FEATURES \ .gen = 7, .num_pipes = 2, \ .has_psr = 1, \ + .has_runtime_pm = 1, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .display_mmio_offset = VLV_DISPLAY_BASE, \ @@ -258,7 +260,8 @@ static const struct intel_device_info intel_valleyview_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \ .has_ddi = 1, \ .has_fpga_dbg = 1, \ - .has_psr = 1 + .has_psr = 1, \ + .has_runtime_pm = 1 static const struct intel_device_info intel_haswell_info = { HSW_FEATURES, @@ -288,6 +291,7 @@ static const struct intel_device_info intel_cherryview_info = { .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, .is_cherryview = 1, .has_psr = 1, + .has_runtime_pm = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, @@ -316,6 +320,7 @@ static const struct intel_device_info intel_broxton_info = { .has_ddi = 1, .has_fpga_dbg = 1, .has_fbc = 1, + .has_runtime_pm = 1, .has_pooled_eu = 0, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, |