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| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2022-05-19 11:07:56 +0200 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2022-05-20 09:32:41 +0200 |
| commit | 9602efab9f8652ef39dc2789edcd26c3d1d3f901 (patch) | |
| tree | fcf72565aff186038bc15c07b7c89a0b425e021a /drivers/gpu/drm/i915/i915_pci.c | |
| parent | drm/i915/dg2: Extend Wa_22010954014 to DG2-G11 and DG2-G12 (diff) | |
| download | linux-9602efab9f8652ef39dc2789edcd26c3d1d3f901.tar.xz linux-9602efab9f8652ef39dc2789edcd26c3d1d3f901.zip | |
Revert "drm/i915: Drop has_psr from device info"
This reverts commit b15a7357a84f091fde8ce35bf2fd494150ad4bd0.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220519090802.1294691-2-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_pci.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_pci.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 0e1d0493d3fe..5ceca6d99f26 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -635,6 +635,7 @@ static const struct intel_device_info chv_info = { .display.has_dmc = 1, \ .display.has_hdcp = 1, \ .display.has_ipc = 1, \ + .display.has_psr = 1, \ .display.has_psr_hw_tracking = 1, \ .dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \ .dbuf.slice_mask = BIT(DBUF_S1) @@ -683,6 +684,7 @@ static const struct intel_device_info skl_gt4_info = { .display.has_fpga_dbg = 1, \ .display.fbc_mask = BIT(INTEL_FBC_A), \ .display.has_hdcp = 1, \ + .display.has_psr = 1, \ .display.has_psr_hw_tracking = 1, \ .has_runtime_pm = 1, \ .display.has_dmc = 1, \ @@ -934,6 +936,7 @@ static const struct intel_device_info adl_s_info = { .display.has_hdcp = 1, \ .display.has_hotplug = 1, \ .display.has_ipc = 1, \ + .display.has_psr = 1, \ .display.ver = 13, \ .display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \ .pipe_offsets = { \ |