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authorLinus Torvalds <torvalds@linux-foundation.org>2015-07-02 23:36:40 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2015-07-02 23:36:40 +0200
commitc021bf1e52d9bf6e3d432b2b4eb6396796d4a16d (patch)
tree9531f88217147baea4e32977358ff3b3aed7456b /drivers/gpu/drm/i915/i915_reg.h
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/sag... (diff)
parentdrm/i915: Clear pipe's pll hw state in hsw_dp_set_ddi_pll_sel() (diff)
downloadlinux-c021bf1e52d9bf6e3d432b2b4eb6396796d4a16d.tar.xz
linux-c021bf1e52d9bf6e3d432b2b4eb6396796d4a16d.zip
Merge tag 'drm-intel-next-fixes-2015-07-02' of git://anongit.freedesktop.org/drm-intel
Pull intel drm fixes from Jani Nikula: "Almost all of it is regression fixes all around, with cc: stable, and then there's Ander's fix for one of the warnings you reported. We're still working on the rest" [ Dave is on vacation, and Jani is heading out on vacation too ] * tag 'drm-intel-next-fixes-2015-07-02' of git://anongit.freedesktop.org/drm-intel: drm/i915: Clear pipe's pll hw state in hsw_dp_set_ddi_pll_sel() drm/i915: fix backlight after resume on 855gm agp/intel: Fix typo in needs_ilk_vtd_wa() drm/i915/ppgtt: Break loop in gen8_ppgtt_clear_range failure path drm/i915: Fix IPS related flicker
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index f5edb3504167..2030f602cbf8 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3491,6 +3491,7 @@ enum skl_disp_power_wells {
#define BLM_POLARITY_PNV (1 << 0) /* pnv only */
#define BLC_HIST_CTL (dev_priv->info.display_mmio_offset + 0x61260)
+#define BLM_HISTOGRAM_ENABLE (1 << 31)
/* New registers for PCH-split platforms. Safe where new bits show up, the
* register layout machtes with gen4 BLC_PWM_CTL[12]. */