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authorJesse Barnes <jbarnes@virtuousgeek.org>2011-06-28 22:04:16 +0200
committerKeith Packard <keithp@keithp.com>2011-06-28 22:54:27 +0200
commit23b2f8bb92feb83127679c53633def32d3108e70 (patch)
tree95d007f504488f5988e638f2504ba94372f142bc /drivers/gpu/drm/i915/i915_suspend.c
parentcpufreq: expose a cpufreq_quick_get_max routine (diff)
downloadlinux-23b2f8bb92feb83127679c53633def32d3108e70.tar.xz
linux-23b2f8bb92feb83127679c53633def32d3108e70.zip
drm/i915: load a ring frequency scaling table v3
The ring frequency scaling table tells the PCU to treat certain GPU frequencies as if they were a given CPU frequency for purposes of scaling the ring frequency. Normally the PCU will scale the ring frequency based on the CPU P-state, but with the table present, it will also take the GPU frequency into account. The main downside of keeping the ring frequency high while the CPU is at a low frequency (or asleep altogether) is increased power consumption. But then if you're keeping your GPU busy, you probably want the extra performance. v2: - add units to debug table header (from Eric) - use tsc_khz as a fallback if the cpufreq driver doesn't give us a freq (from Chris) v3: - fix comments & debug output - remove unneeded force wake get/put Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Tested-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_suspend.c')
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index e8152d23d5b6..6fbd997f5a6c 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -875,8 +875,10 @@ int i915_restore_state(struct drm_device *dev)
intel_init_emon(dev);
}
- if (IS_GEN6(dev))
+ if (IS_GEN6(dev)) {
gen6_enable_rps(dev_priv);
+ gen6_update_ring_freq(dev_priv);
+ }
/* Cache mode state */
I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);