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| author | José Roberto de Souza <jose.souza@intel.com> | 2019-08-17 11:38:25 +0200 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2019-08-20 21:49:17 +0200 |
| commit | 9288d74f3f58bdf778606a3eee67df89305752f4 (patch) | |
| tree | cc99473f211fbb06c4876e2c31ee60fecd64b706 /drivers/gpu/drm/i915/intel_csr.c | |
| parent | drm/i915/tgl: add support for reading the timestamp frequency (diff) | |
| download | linux-9288d74f3f58bdf778606a3eee67df89305752f4.tar.xz linux-9288d74f3f58bdf778606a3eee67df89305752f4.zip | |
drm/i915/tgl: Move transcoders to pipes' powerwells
When trying to read registers from transcoder C and D while PG3 is ON it
causes unclaimed access warnings. Adding the powerwells for the pipes
fixes the issue, but doesn't match the spec.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190817093902.2171-4-lucas.demarchi@intel.com
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions