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authorVille Syrjälä <ville.syrjala@linux.intel.com>2019-02-18 20:31:32 +0100
committerVille Syrjälä <ville.syrjala@linux.intel.com>2019-03-15 21:32:13 +0100
commit9fdfb8e7308b0a82c1cc0bbd120450faf8bd837d (patch)
tree7b012715fb2a0a68423590738ec3dbeeac48659a /drivers/gpu/drm/i915/intel_drv.h
parentdrm/i915: Readout and check csc_mode (diff)
downloadlinux-9fdfb8e7308b0a82c1cc0bbd120450faf8bd837d.tar.xz
linux-9fdfb8e7308b0a82c1cc0bbd120450faf8bd837d.zip
drm/i915: Precompute/readout/check CHV CGM mode
Let's precompute the CGM mode for CHV. And naturally we also read it out and check it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-3-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f0d554761916..8377ae9c0521 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1021,8 +1021,13 @@ struct intel_crtc_state {
/* Gamma mode programmed on the pipe */
u32 gamma_mode;
- /* CSC mode programmed on the pipe */
- u32 csc_mode;
+ union {
+ /* CSC mode programmed on the pipe */
+ u32 csc_mode;
+
+ /* CHV CGM mode */
+ u32 cgm_mode;
+ };
/* bitmask of visible planes (enum plane_id) */
u8 active_planes;