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authorDeepak M <m.deepak@intel.com>2016-04-26 15:14:26 +0200
committerJani Nikula <jani.nikula@intel.com>2016-05-17 15:12:39 +0200
commit1ecc1c6cb7d3549d8854b0d6ac5a86a622ca6fa3 (patch)
tree929fe0744596f8bf26f1a8b237507234b8942dfa /drivers/gpu/drm/i915/intel_dsi.h
parentdrm/i915/dsi: Add DCS control for Panel PWM (diff)
downloadlinux-1ecc1c6cb7d3549d8854b0d6ac5a86a622ca6fa3.tar.xz
linux-1ecc1c6cb7d3549d8854b0d6ac5a86a622ca6fa3.zip
drm/i915/dsi: CABC support for Panel PWM backlight control
In CABC (Content Adaptive Brightness Control) content grey level scale can be increased while simultaneously decreasing brightness of the backlight to achieve same perceived brightness. The CABC is not standardized and panel vendors are free to follow their implementation. The CABC implementaion here assumes that the panels use standard SW register for control. CABC is supported only when the PWM source for backlight is from the panel. v2 by Jani: rebase, renames, check cabc support earlier, etc. Signed-off-by: Deepak M <m.deepak@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/883faade74d2e598b143221ccc7df6daf4393a13.1461676337.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.h')
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index b00fb3fbb0b1..5967ea6d6045 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -80,6 +80,7 @@ struct intel_dsi {
u8 dual_link;
u16 dcs_backlight_ports;
+ u16 dcs_cabc_ports;
u8 pixel_overlap;
u32 port_bits;