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authorRodrigo Vivi <rodrigo.vivi@intel.com>2018-02-22 21:05:35 +0100
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-02-28 00:54:30 +0100
commitd66047e4a582103d4c6a884692f402b905032f26 (patch)
tree89833a5f480102076e7b52770a5846da07313687 /drivers/gpu/drm/i915/intel_guc.c
parentdrm/i915/psr: Don't avoid PSR when PSR2 conditions are not met. (diff)
downloadlinux-d66047e4a582103d4c6a884692f402b905032f26.tar.xz
linux-d66047e4a582103d4c6a884692f402b905032f26.zip
drm/i915/cnl: Add WaRsDisableCoarsePowerGating
Old Wa added now forever on CNL all steppings. With CPU P states enabled along with RC6, dispatcher hangs can happen. Cc: Rafael Antognolli <rafael.antognolli@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180222200535.9290-1-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc.c')
-rw-r--r--drivers/gpu/drm/i915/intel_guc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index 21140ccd7a97..e6512cccef75 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -370,7 +370,7 @@ int intel_guc_sample_forcewake(struct intel_guc *guc)
u32 action[2];
action[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
- /* WaRsDisableCoarsePowerGating:skl,bxt */
+ /* WaRsDisableCoarsePowerGating:skl,cnl */
if (!HAS_RC6(dev_priv) || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
action[1] = 0;
else