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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-25 22:52:16 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-30 16:16:14 +0200 |
| commit | 68fc874289e58e62bd0820db0d52150ce6d9fe03 (patch) | |
| tree | a088d2f161bfb65470284d8ac6daf17ad76e18e2 /drivers/gpu/drm/i915/intel_lvds.c | |
| parent | drm/i915: cleanup opregion asle pipestat enable (diff) | |
| download | linux-68fc874289e58e62bd0820db0d52150ce6d9fe03.tar.xz linux-68fc874289e58e62bd0820db0d52150ce6d9fe03.zip | |
drm/i915: move lvds_border_bits to pipe_config
pipe_config is the new dev_priv!
More seriously, this is actually better since a pipe_config can be
thrown away if the modeset compute config stage fails. Whereas any
state stored in dev_prive needs to be painstakingly restored, since
otherwise a dpms off/on will wreak massive havoc. Yes, that even
applies to state only used in ->mode_set callbacks, since we need to
call those even for dpms on when the Haswell power well cleared
everything out.
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 8d65baf043ea..47f47ea64f59 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -116,7 +116,7 @@ static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder) } /* set the corresponsding LVDS_BORDER bit */ - temp |= dev_priv->lvds_border_bits; + temp |= intel_crtc->config.gmch_pfit.lvds_border_bits; /* Set the B0-B3 data pairs corresponding to whether we're going to * set the DPLLs for dual-channel mode or not. */ |