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author | Damien Lespiau <damien.lespiau@intel.com> | 2013-08-19 20:32:03 +0200 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-08-23 14:52:24 +0200 |
commit | e3ce7633ba38a97c2203ab60f381ce1642940328 (patch) | |
tree | cf6864202c4a4cca011e7137f0406fdda5909ee7 /drivers/gpu/drm/i915/intel_ringbuffer.h | |
parent | drm: Remove IS_IRONLAKE_D() (diff) | |
download | linux-e3ce7633ba38a97c2203ab60f381ce1642940328.tar.xz linux-e3ce7633ba38a97c2203ab60f381ce1642940328.zip |
drm/i915: Remove I915_READ_{NOPID, SYNC_0, SYNC_1})()
The code directly uses the registers and ring->mmio_base.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index 5e6be842d225..432ad5311ba6 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -33,10 +33,6 @@ struct intel_hw_status_page { #define I915_READ_IMR(ring) I915_READ(RING_IMR((ring)->mmio_base)) #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val) -#define I915_READ_NOPID(ring) I915_READ(RING_NOPID((ring)->mmio_base)) -#define I915_READ_SYNC_0(ring) I915_READ(RING_SYNC_0((ring)->mmio_base)) -#define I915_READ_SYNC_1(ring) I915_READ(RING_SYNC_1((ring)->mmio_base)) - enum intel_ring_hangcheck_action { HANGCHECK_WAIT, HANGCHECK_ACTIVE, |