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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-10-08 01:01:18 +0200
committerChris Wilson <chris@chris-wilson.co.uk>2010-10-08 11:28:23 +0200
commit83240120878805b537a2efeaabff92798140b7cf (patch)
tree8c2a2a4f89a015843fdb27e6b7f02bfda0d522e9 /drivers/gpu/drm/i915
parentdrm/i915: use 120MHz refclk in PCH eDP case too (diff)
downloadlinux-83240120878805b537a2efeaabff92798140b7cf.tar.xz
linux-83240120878805b537a2efeaabff92798140b7cf.zip
drm/i915: use DPLL_DVO_HIGH_SPEED for PCH eDP
As with other PCH DP connections. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5f00632d6fcc..acd7180ba7c7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3850,7 +3850,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
}
dpll |= DPLL_DVO_HIGH_SPEED;
}
- if (is_dp)
+ if (is_dp || intel_encoder_is_pch_edp(&has_edp_encoder->base))
dpll |= DPLL_DVO_HIGH_SPEED;
/* compute bitmask from p1 value */