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authorJesse Barnes <jbarnes@virtuousgeek.org>2009-12-03 18:52:43 +0100
committerEric Anholt <eric@anholt.net>2009-12-07 21:11:52 +0100
commit85364905f9ae12d19cb34099257d493e5d9a0c4e (patch)
tree21355931ce3f3b2ddb7c07e0d4207179d5251989 /drivers/gpu/drm/i915
parentdrm/i915: pageflip fixes (diff)
downloadlinux-85364905f9ae12d19cb34099257d493e5d9a0c4e.tar.xz
linux-85364905f9ae12d19cb34099257d493e5d9a0c4e.zip
drm/i915: warn if Pineview CxSR can't be enabled
If we don't detect a supported memory configuration, we can't enable CxSR. Warn the user in this case so they can file a bug.
Diffstat (limited to 'drivers/gpu/drm/i915')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 22dcd0851637..6b9dd672dd59 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4740,6 +4740,13 @@ void intel_modeset_init(struct drm_device *dev)
(unsigned long)dev);
intel_setup_overlay(dev);
+
+ if (IS_IGD(dev) && !intel_get_cxsr_latency(IS_IGDG(dev),
+ dev_priv->fsb_freq,
+ dev_priv->mem_freq))
+ DRM_INFO("failed to find known CxSR latency "
+ "(found fsb freq %d, mem freq %d), disabling CxSR\n",
+ dev_priv->fsb_freq, dev_priv->mem_freq);
}
void intel_modeset_cleanup(struct drm_device *dev)