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authorBen Skeggs <bskeggs@redhat.com>2016-11-04 08:20:35 +0100
committerBen Skeggs <bskeggs@redhat.com>2016-11-07 05:04:42 +0100
commit4cddeb9b315784c90c81db386943bca22690cb27 (patch)
tree4cd4e35637dda674b44d8afe4fd6f0e1d329d72e /drivers/gpu/drm/nouveau/include/nvif
parentdrm/nouveau/disp/sor/gf119-: add method to control mst enable (diff)
downloadlinux-4cddeb9b315784c90c81db386943bca22690cb27.tar.xz
linux-4cddeb9b315784c90c81db386943bca22690cb27.zip
drm/nouveau/disp/sor/gf119-: add method to program mst payload information
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include/nvif')
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/cl5070.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl5070.h b/drivers/gpu/drm/nouveau/include/nvif/cl5070.h
index ed999fc38833..ae49dfd1f97b 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/cl5070.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/cl5070.h
@@ -35,6 +35,7 @@ struct nv50_disp_mthd_v1 {
#define NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT 0x23
#define NV50_DISP_MTHD_V1_SOR_DP_PWR 0x24
#define NV50_DISP_MTHD_V1_SOR_DP_MST_LINK 0x25
+#define NV50_DISP_MTHD_V1_SOR_DP_MST_VCPI 0x26
#define NV50_DISP_MTHD_V1_PIOR_PWR 0x30
__u8 method;
__u16 hasht;
@@ -97,6 +98,15 @@ struct nv50_disp_sor_dp_mst_link_v0 {
__u8 pad02[6];
};
+struct nv50_disp_sor_dp_mst_vcpi_v0 {
+ __u8 version;
+ __u8 pad01[1];
+ __u8 start_slot;
+ __u8 num_slots;
+ __u16 pbn;
+ __u16 aligned_pbn;
+};
+
struct nv50_disp_pior_pwr_v0 {
__u8 version;
__u8 state;