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authorBen Skeggs <bskeggs@redhat.com>2020-06-22 09:07:31 +0200
committerBen Skeggs <bskeggs@redhat.com>2020-07-24 10:51:04 +0200
commit6c75137274b050e9baaa5b2904b165a49c671273 (patch)
tree8c3aea701424ceab05881ca9e85ed0a79f648a9d /drivers/gpu/drm/nouveau/nouveau_bo5039.c
parentdrm/nouveau/bo: use NVIDIA's headers for move init() (diff)
downloadlinux-6c75137274b050e9baaa5b2904b165a49c671273.tar.xz
linux-6c75137274b050e9baaa5b2904b165a49c671273.zip
drm/nouveau/bo: use NVIDIA's headers for move move()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_bo5039.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bo5039.c84
1 files changed, 57 insertions, 27 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo5039.c b/drivers/gpu/drm/nouveau/nouveau_bo5039.c
index 232877f8b93d..f9b9b85abe44 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo5039.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo5039.c
@@ -60,40 +60,70 @@ nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
height = amount / stride;
if (src_tiled) {
- PUSH_NVSQ(push, NV5039, 0x0200, 0,
- 0x0204, 0,
- 0x0208, stride,
- 0x020c, height,
- 0x0210, 1,
- 0x0214, 0,
- 0x0218, 0);
+ PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT,
+ NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, BLOCKLINEAR),
+
+ SET_SRC_BLOCK_SIZE,
+ NVDEF(NV5039, SET_SRC_BLOCK_SIZE, WIDTH, ONE_GOB) |
+ NVDEF(NV5039, SET_SRC_BLOCK_SIZE, HEIGHT, ONE_GOB) |
+ NVDEF(NV5039, SET_SRC_BLOCK_SIZE, DEPTH, ONE_GOB),
+
+ SET_SRC_WIDTH, stride,
+ SET_SRC_HEIGHT, height,
+ SET_SRC_DEPTH, 1,
+ SET_SRC_LAYER, 0,
+
+ SET_SRC_ORIGIN,
+ NVVAL(NV5039, SET_SRC_ORIGIN, X, 0) |
+ NVVAL(NV5039, SET_SRC_ORIGIN, Y, 0));
} else {
- PUSH_NVSQ(push, NV5039, 0x0200, 1);
+ PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT,
+ NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, PITCH));
}
if (dst_tiled) {
- PUSH_NVSQ(push, NV5039, 0x021c, 0,
- 0x0220, 0,
- 0x0224, stride,
- 0x0228, height,
- 0x022c, 1,
- 0x0230, 0,
- 0x0234, 0);
+ PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT,
+ NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, BLOCKLINEAR),
+
+ SET_DST_BLOCK_SIZE,
+ NVDEF(NV5039, SET_DST_BLOCK_SIZE, WIDTH, ONE_GOB) |
+ NVDEF(NV5039, SET_DST_BLOCK_SIZE, HEIGHT, ONE_GOB) |
+ NVDEF(NV5039, SET_DST_BLOCK_SIZE, DEPTH, ONE_GOB),
+
+ SET_DST_WIDTH, stride,
+ SET_DST_HEIGHT, height,
+ SET_DST_DEPTH, 1,
+ SET_DST_LAYER, 0,
+
+ SET_DST_ORIGIN,
+ NVVAL(NV5039, SET_DST_ORIGIN, X, 0) |
+ NVVAL(NV5039, SET_DST_ORIGIN, Y, 0));
} else {
- PUSH_NVSQ(push, NV5039, 0x021c, 1);
+ PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT,
+ NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, PITCH));
}
- PUSH_NVSQ(push, NV5039, 0x0238, upper_32_bits(src_offset),
- 0x023c, upper_32_bits(dst_offset));
- PUSH_NVSQ(push, NV5039, 0x030c, lower_32_bits(src_offset),
- 0x0310, lower_32_bits(dst_offset),
- 0x0314, stride,
- 0x0318, stride,
- 0x031c, stride,
- 0x0320, height,
- 0x0324, 0x00000101,
- 0x0328, 0x00000000);
- PUSH_NVSQ(push, NV5039, 0x0100, 0x00000000);
+ PUSH_MTHD(push, NV5039, OFFSET_IN_UPPER,
+ NVVAL(NV5039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)),
+
+ OFFSET_OUT_UPPER,
+ NVVAL(NV5039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset)));
+
+ PUSH_MTHD(push, NV5039, OFFSET_IN, lower_32_bits(src_offset),
+ OFFSET_OUT, lower_32_bits(dst_offset),
+ PITCH_IN, stride,
+ PITCH_OUT, stride,
+ LINE_LENGTH_IN, stride,
+ LINE_COUNT, height,
+
+ FORMAT,
+ NVDEF(NV5039, FORMAT, IN, ONE) |
+ NVDEF(NV5039, FORMAT, OUT, ONE),
+
+ BUFFER_NOTIFY,
+ NVDEF(NV5039, BUFFER_NOTIFY, TYPE, WRITE_ONLY));
+
+ PUSH_MTHD(push, NV5039, NO_OPERATION, 0x00000000);
length -= amount;
src_offset += amount;