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| author | Ben Skeggs <bskeggs@redhat.com> | 2010-11-22 07:05:54 +0100 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2010-12-08 03:00:34 +0100 |
| commit | d908175cca901b95ba1628428b216e6e7188e8fb (patch) | |
| tree | 720e95c36101ca4fa2d46792c58bd2456c2df8db /drivers/gpu/drm/nouveau/nv40_fifo.c | |
| parent | drm/nouveau: Spin for a bit in nouveau_fence_wait() before yielding the CPU. (diff) | |
| download | linux-d908175cca901b95ba1628428b216e6e7188e8fb.tar.xz linux-d908175cca901b95ba1628428b216e6e7188e8fb.zip | |
drm/nouveau: make fifo.create_context() responsible for mapping control regs
The regs belong to PFIFO, they're different for pretty much the same
generations we need different PFIFO control for, and NVC0 is going
to be even more different than the rest.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv40_fifo.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv40_fifo.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv40_fifo.c b/drivers/gpu/drm/nouveau/nv40_fifo.c index f6b3580c685a..c86e4d4e9b96 100644 --- a/drivers/gpu/drm/nouveau/nv40_fifo.c +++ b/drivers/gpu/drm/nouveau/nv40_fifo.c @@ -47,6 +47,11 @@ nv40_fifo_create_context(struct nouveau_channel *chan) if (ret) return ret; + chan->user = ioremap(pci_resource_start(dev->pdev, 0) + + NV40_USER(chan->id), PAGE_SIZE); + if (!chan->user) + return -ENOMEM; + spin_lock_irqsave(&dev_priv->context_switch_lock, flags); nv_wi32(dev, fc + 0, chan->pushbuf_base); |