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authorMarcin Koƛcielnicki <koriakin@0x04.net>2010-02-25 19:53:37 +0100
committerBen Skeggs <bskeggs@redhat.com>2010-03-10 07:06:40 +0100
commit37000d275721e25af6b49fbb2dbcd04022091276 (patch)
tree3d223727eadd046dfa85a9065770fa6d293dfe69 /drivers/gpu/drm/nouveau/nv50_graph.c
parentdrm/nouveau: use ALIGN instead of open coding it (diff)
downloadlinux-37000d275721e25af6b49fbb2dbcd04022091276.tar.xz
linux-37000d275721e25af6b49fbb2dbcd04022091276.zip
drm/nv50: Remove redundant/incorrect ctxvals initialisation.
11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised earlier anyway by both our ctxprog generator and blob ctxvals. It's actually incorrect with the generator, since we use different layout on pre-NVA0. Signed-off-by: Marcin Koƛcielnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_graph.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 857a09671a39..08d87b749a52 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -229,10 +229,6 @@ nv50_graph_create_context(struct nouveau_channel *chan)
nouveau_grctx_vals_load(dev, ctx);
}
nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
- if ((dev_priv->chipset & 0xf0) == 0xa0)
- nv_wo32(dev, ctx, 0x00004/4, 0x00000000);
- else
- nv_wo32(dev, ctx, 0x0011c/4, 0x00000000);
dev_priv->engine.instmem.finish_access(dev);
return 0;