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author | Douglas Anderson <dianders@chromium.org> | 2021-07-30 17:46:03 +0200 |
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committer | Sam Ravnborg <sam@ravnborg.org> | 2021-07-31 20:10:45 +0200 |
commit | 7c4125b093d5e20d1c074fa160c8f07d9a72c435 (patch) | |
tree | 80a8e93674afd317f32a4be612cbd4603c2ad96d /drivers/gpu/drm/panel/panel-simple.c | |
parent | drm/bridge: ti-sn65dsi86: Add some 100 us delays (diff) | |
download | linux-7c4125b093d5e20d1c074fa160c8f07d9a72c435.tar.xz linux-7c4125b093d5e20d1c074fa160c8f07d9a72c435.zip |
Revert "drm/panel-simple: Add Samsung ATNA33XC20"
This reverts commit 4bfe6c8f7c23b01719671b69fd29b87a35ccd9d6.
This panel's power sequencing really can't be handled properly by
panel-simple because of the special sequencing needed for the EL_ON3
GPIO. The only way it was sorta working in the past was by trying to
jam that signal into the "enable-gpio", but that really wasn't a good
fit. We'll add a custom panel driver for this panel to do it right.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210730084534.v2.4.Id9f076ec5f35633f8ce931051af268a04c45c075@changeid
Diffstat (limited to 'drivers/gpu/drm/panel/panel-simple.c')
-rw-r--r-- | drivers/gpu/drm/panel/panel-simple.c | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index dff3dedd734b..a5038b968b08 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3681,36 +3681,6 @@ static const struct panel_desc rocktech_rk101ii01d_ct = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; -static const struct drm_display_mode samsung_atna33xc20_mode = { - .clock = 138770, - .hdisplay = 1920, - .hsync_start = 1920 + 48, - .hsync_end = 1920 + 48 + 32, - .htotal = 1920 + 48 + 32 + 80, - .vdisplay = 1080, - .vsync_start = 1080 + 8, - .vsync_end = 1080 + 8 + 8, - .vtotal = 1080 + 8 + 8 + 16, - .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, -}; - -static const struct panel_desc samsung_atna33xc20 = { - .modes = &samsung_atna33xc20_mode, - .num_modes = 1, - .bpc = 10, - .size = { - .width = 294, - .height = 165, - }, - .delay = { - .disable_to_power_off = 200, - .power_to_enable = 400, - .hpd_absent_delay = 200, - .unprepare = 500, - }, - .connector_type = DRM_MODE_CONNECTOR_eDP, -}; - static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { .clock = 271560, .hdisplay = 2560, @@ -4724,9 +4694,6 @@ static const struct of_device_id platform_of_match[] = { .compatible = "rocktech,rk101ii01d-ct", .data = &rocktech_rk101ii01d_ct, }, { - .compatible = "samsung,atna33xc20", - .data = &samsung_atna33xc20, - }, { .compatible = "samsung,lsn122dl01-c01", .data = &samsung_lsn122dl01_c01, }, { |