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| author | Alex Deucher <alexander.deucher@amd.com> | 2014-07-30 23:57:28 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-08-05 14:53:43 +0200 |
| commit | 3157c5897212997da27ea1a641a246f2a1808cff (patch) | |
| tree | 106b3abe0e52a92403f119fcfe04bc25582931d2 /drivers/gpu/drm/radeon/evergreen.c | |
| parent | drm/radeon: set VM base addr using the PFP v2 (diff) | |
| download | linux-3157c5897212997da27ea1a641a246f2a1808cff.tar.xz linux-3157c5897212997da27ea1a641a246f2a1808cff.zip | |
drm/radeon: fix reversed logic in evergreen_mc_resume
Need to unblank the display when resuming the MC. No
functional change as this code path is not currently
hit. We always disable the displays entirely rather
than just blanking them.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 27ebaaa88d89..cb2043973583 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -2676,7 +2676,7 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s if (save->crtc_enabled[i]) { if (ASIC_IS_DCE6(rdev)) { tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); - tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; + tmp &= ~EVERGREEN_CRTC_BLANK_DATA_EN; WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp); WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0); |