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authorAlex Deucher <alexander.deucher@amd.com>2013-04-08 12:41:32 +0200
committerAlex Deucher <alexander.deucher@amd.com>2013-04-09 16:31:35 +0200
commit23d33ba32bad60a17ca26f631d1d2cf6b12662e5 (patch)
tree86681373847e4831d6c14fb998e259c97493a880 /drivers/gpu/drm/radeon/evergreend.h
parentdrm/radeon: add radeon_atom_get_clock_dividers helper (diff)
downloadlinux-23d33ba32bad60a17ca26f631d1d2cf6b12662e5.tar.xz
linux-23d33ba32bad60a17ca26f631d1d2cf6b12662e5.zip
drm/radeon: add set_uvd_clocks callback for ON/LN/TN (v4)
v2: write clk registers only once! v3: update cg scratch register properly v4: add TN support Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index c5d873e525c9..b6491a300c5c 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -53,6 +53,16 @@
#define RCU_IND_INDEX 0x100
#define RCU_IND_DATA 0x104
+/* fusion uvd clocks */
+#define CG_DCLK_CNTL 0x610
+# define DCLK_DIVIDER_MASK 0x7f
+# define DCLK_DIR_CNTL_EN (1 << 8)
+#define CG_DCLK_STATUS 0x614
+# define DCLK_STATUS (1 << 0)
+#define CG_VCLK_CNTL 0x618
+#define CG_VCLK_STATUS 0x61c
+#define CG_SCRATCH1 0x820
+
#define GRBM_GFX_INDEX 0x802C
#define INSTANCE_INDEX(x) ((x) << 0)
#define SE_INDEX(x) ((x) << 16)