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authorAlex Deucher <alexander.deucher@amd.com>2013-02-15 22:26:33 +0100
committerAlex Deucher <alexander.deucher@amd.com>2013-06-28 01:16:28 +0200
commit8ba104637b5901cdc52fb0455cefcc73dc4b10e4 (patch)
tree9ae132c6b918e13c5e399f8f3c84396e3f80311b /drivers/gpu/drm/radeon/evergreend.h
parentdrm/radeon: add support for ASPM on SI asics (v2) (diff)
downloadlinux-8ba104637b5901cdc52fb0455cefcc73dc4b10e4.tar.xz
linux-8ba104637b5901cdc52fb0455cefcc73dc4b10e4.zip
drm/radeon: enable additional power gating features on trinity
TN has some additional powergating features beyond what is supported on ON/LN. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreend.h')
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index c0df1cac9485..a7baf67aef6c 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -381,6 +381,10 @@
# define RLC_ENABLE (1 << 0)
# define GFX_POWER_GATING_ENABLE (1 << 7)
# define GFX_POWER_GATING_SRC (1 << 8)
+# define DYN_PER_SIMD_PG_ENABLE (1 << 27)
+# define LB_CNT_SPIM_ACTIVE (1 << 30)
+# define LOAD_BALANCE_ENABLE (1 << 31)
+
#define RLC_HB_BASE 0x3f10
#define RLC_HB_CNTL 0x3f0c
#define RLC_HB_RPTR 0x3f20
@@ -394,7 +398,12 @@
/* new for TN */
#define TN_RLC_SAVE_AND_RESTORE_BASE 0x3f10
+#define TN_RLC_LB_CNTR_MAX 0x3f14
+#define TN_RLC_LB_CNTR_INIT 0x3f18
#define TN_RLC_CLEAR_STATE_RESTORE_BASE 0x3f20
+#define TN_RLC_LB_INIT_SIMD_MASK 0x3fe4
+#define TN_RLC_LB_ALWAYS_ACTIVE_SIMD_MASK 0x3fe8
+#define TN_RLC_LB_PARAMS 0x3fec
#define GRBM_GFX_INDEX 0x802C
#define INSTANCE_INDEX(x) ((x) << 0)