summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/kv_dpm.c
diff options
context:
space:
mode:
authorAlex Deucher <alexander.deucher@amd.com>2013-07-18 22:39:53 +0200
committerAlex Deucher <alexander.deucher@amd.com>2013-08-30 22:30:32 +0200
commitae3e40e8712414321ef2b61e8bb26a5d9701643b (patch)
tree1d9452470a10c08b758b144bf27833958b920408 /drivers/gpu/drm/radeon/kv_dpm.c
parentdrm/radeon/dpm: implement vblank_too_short callback for CI (diff)
downloadlinux-ae3e40e8712414321ef2b61e8bb26a5d9701643b.tar.xz
linux-ae3e40e8712414321ef2b61e8bb26a5d9701643b.zip
drm/radeon/dpm: add debugfs support for KB/KV
This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/kv_dpm.c')
-rw-r--r--drivers/gpu/drm/radeon/kv_dpm.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/kv_dpm.c b/drivers/gpu/drm/radeon/kv_dpm.c
index 2e4016356dab..d584ee4a09ad 100644
--- a/drivers/gpu/drm/radeon/kv_dpm.c
+++ b/drivers/gpu/drm/radeon/kv_dpm.c
@@ -26,6 +26,7 @@
#include "cikd.h"
#include "r600_dpm.h"
#include "kv_dpm.h"
+#include <linux/seq_file.h>
#define KV_MAX_DEEPSLEEP_DIVIDER_ID 5
#define KV_MINIMUM_ENGINE_CLOCK 800
@@ -2481,6 +2482,28 @@ int kv_dpm_init(struct radeon_device *rdev)
return 0;
}
+void kv_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
+ struct seq_file *m)
+{
+ struct kv_power_info *pi = kv_get_pi(rdev);
+ u32 current_index =
+ (RREG32_SMC(TARGET_AND_CURRENT_PROFILE_INDEX) & CURR_SCLK_INDEX_MASK) >>
+ CURR_SCLK_INDEX_SHIFT;
+ u32 sclk, tmp;
+ u16 vddc;
+
+ if (current_index >= SMU__NUM_SCLK_DPM_STATE) {
+ seq_printf(m, "invalid dpm profile %d\n", current_index);
+ } else {
+ sclk = be32_to_cpu(pi->graphics_level[current_index].SclkFrequency);
+ tmp = (RREG32_SMC(SMU_VOLTAGE_STATUS) & SMU_VOLTAGE_CURRENT_LEVEL_MASK) >>
+ SMU_VOLTAGE_CURRENT_LEVEL_SHIFT;
+ vddc = kv_convert_8bit_index_to_voltage(rdev, (u16)tmp);
+ seq_printf(m, "power level %d sclk: %u vddc: %u\n",
+ current_index, sclk, vddc);
+ }
+}
+
void kv_dpm_print_power_state(struct radeon_device *rdev,
struct radeon_ps *rps)
{