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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-07 19:01:56 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-07 19:01:56 +0100
commit83dbb15e9cd78a3619e3db36777e2f81d09b2914 (patch)
tree521737fc0829222c2739e4d50bf8546a39d6aa0e /drivers/gpu/drm/radeon/ni.c
parentMerge branch 'urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/... (diff)
parentvmwgfx: Snoop DMA transfers with non-covering sizes (diff)
downloadlinux-83dbb15e9cd78a3619e3db36777e2f81d09b2914.tar.xz
linux-83dbb15e9cd78a3619e3db36777e2f81d09b2914.zip
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (40 commits) vmwgfx: Snoop DMA transfers with non-covering sizes vmwgfx: Move the prefered mode first in the list vmwgfx: Unreference surface on cursor error path vmwgfx: Free prefered mode on error path vmwgfx: Use pointer return error codes vmwgfx: Fix hw cursor position vmwgfx: Infrastructure for explicit placement vmwgfx: Make the preferred autofit mode have a 60Hz vrefresh vmwgfx: Remove screen object active list vmwgfx: Screen object cleanups drm/radeon/kms: consolidate GART code, fix segfault after GPU lockup V2 drm/radeon/kms: don't poll forever if MC GDDR link training fails drm/radeon/kms: fix DP setup on TRAVIS bridges drm/radeon/kms: set HPD polarity in hpd_init() drm/radeon/kms: add MSI module parameter drm/radeon/kms: Add MSI quirk for Dell RS690 drm/radeon/kms: Add MSI quirk for HP RS690 drm/radeon/kms: split MSI check into a separate function vmwgfx: Reinstate the update_layout ioctl drm/radeon/kms: always do extended edid probe ...
Diffstat (limited to 'drivers/gpu/drm/radeon/ni.c')
-rw-r--r--drivers/gpu/drm/radeon/ni.c25
1 files changed, 12 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index fdb93f884575..0e5799857465 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -262,8 +262,11 @@ int ni_mc_load_microcode(struct radeon_device *rdev)
WREG32(MC_SEQ_SUP_CNTL, 0x00000001);
/* wait for training to complete */
- while (!(RREG32(MC_IO_PAD_CNTL_D0) & MEM_FALL_OUT_CMD))
- udelay(10);
+ for (i = 0; i < rdev->usec_timeout; i++) {
+ if (RREG32(MC_IO_PAD_CNTL_D0) & MEM_FALL_OUT_CMD)
+ break;
+ udelay(1);
+ }
if (running)
WREG32(MC_SHARED_BLACKOUT_CNTL, blackout);
@@ -933,7 +936,7 @@ int cayman_pcie_gart_enable(struct radeon_device *rdev)
{
int r;
- if (rdev->gart.table.vram.robj == NULL) {
+ if (rdev->gart.robj == NULL) {
dev_err(rdev->dev, "No VRAM object for PCIE GART.\n");
return -EINVAL;
}
@@ -978,8 +981,6 @@ int cayman_pcie_gart_enable(struct radeon_device *rdev)
void cayman_pcie_gart_disable(struct radeon_device *rdev)
{
- int r;
-
/* Disable all tables */
WREG32(VM_CONTEXT0_CNTL, 0);
WREG32(VM_CONTEXT1_CNTL, 0);
@@ -995,14 +996,7 @@ void cayman_pcie_gart_disable(struct radeon_device *rdev)
WREG32(VM_L2_CNTL2, 0);
WREG32(VM_L2_CNTL3, L2_CACHE_BIGK_ASSOCIATIVITY |
L2_CACHE_BIGK_FRAGMENT_SIZE(6));
- if (rdev->gart.table.vram.robj) {
- r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
- if (likely(r == 0)) {
- radeon_bo_kunmap(rdev->gart.table.vram.robj);
- radeon_bo_unpin(rdev->gart.table.vram.robj);
- radeon_bo_unreserve(rdev->gart.table.vram.robj);
- }
- }
+ radeon_gart_table_vram_unpin(rdev);
}
void cayman_pcie_gart_fini(struct radeon_device *rdev)
@@ -1362,6 +1356,10 @@ static int cayman_startup(struct radeon_device *rdev)
return r;
}
+ r = r600_vram_scratch_init(rdev);
+ if (r)
+ return r;
+
evergreen_mc_program(rdev);
r = cayman_pcie_gart_enable(rdev);
if (r)
@@ -1557,6 +1555,7 @@ void cayman_fini(struct radeon_device *rdev)
radeon_ib_pool_fini(rdev);
radeon_irq_kms_fini(rdev);
cayman_pcie_gart_fini(rdev);
+ r600_vram_scratch_fini(rdev);
radeon_gem_fini(rdev);
radeon_fence_driver_fini(rdev);
radeon_bo_fini(rdev);