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authorDave Airlie <airlied@redhat.com>2017-04-10 23:31:18 +0200
committerDave Airlie <airlied@redhat.com>2017-04-10 23:31:18 +0200
commit1420f63b8207e966f54caec26d08abdc2ff37193 (patch)
treeeabaabbcaf7a39e36267a68f867f21504250fee5 /drivers/gpu/drm/radeon/r100.c
parentMerge tag 'drm-intel-testing-2017-04-03' of git://anongit.freedesktop.org/git... (diff)
parentdrm/amdgpu: fix fence memory leak in wait_all_fence V2 (diff)
downloadlinux-1420f63b8207e966f54caec26d08abdc2ff37193.tar.xz
linux-1420f63b8207e966f54caec26d08abdc2ff37193.zip
Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux into drm-next
Just some bug fixes and vega10 updates for 4.12. * 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: drm/amdgpu: fix fence memory leak in wait_all_fence V2 drm/amdgpu: fix "fix 64bit division" drm/amd/powerplay: add fan controller table v11 support. drm/amd/powerplay: port newest process pptable code for vega10. drm/amdgpu: set vm size and block size by individual gmc by default (v3) drm/amdgpu: Avoid overflows/divide-by-zero in latency_watermark calculations. drm/amdgpu: Make display watermark calculations more accurate drm/radeon: fix typo in bandwidth calculation drm/radeon: Refuse to migrate a prime BO to VRAM. (v2) drm/radeon: Maintain prime import/export refcount for BOs drm/amdgpu: Refuse to pin or change acceptable domains of prime BOs to VRAM. (v2) drm/amdgpu: Fail fb creation from imported dma-bufs. (v2) drm/radeon: Fail fb creation from imported dma-bufs.
Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r--drivers/gpu/drm/radeon/r100.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index aefca0b03f38..c31e660e35db 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3295,7 +3295,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
mem_trp = ((temp >> 8) & 0x7) + 1;
mem_tras = ((temp >> 11) & 0xf) + 4;
} else if (rdev->family == CHIP_RV350 ||
- rdev->family <= CHIP_RV380) {
+ rdev->family == CHIP_RV380) {
/* rv3x0 */
mem_trcd = (temp & 0x7) + 3;
mem_trp = ((temp >> 8) & 0x7) + 3;