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| author | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | 2009-04-07 22:34:16 +0200 |
|---|---|---|
| committer | Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> | 2009-04-07 22:34:16 +0200 |
| commit | 38f4b8c0da01ae7cd9b93386842ce272d6fde9ab (patch) | |
| tree | 3c8c52201aac038094bfea7efdd0984a8f62045e /drivers/gpu/drm/radeon/r300_reg.h | |
| parent | Merge branch 'for-linus/xen/core' into for-linus/xen/master (diff) | |
| parent | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jba... (diff) | |
| download | linux-38f4b8c0da01ae7cd9b93386842ce272d6fde9ab.tar.xz linux-38f4b8c0da01ae7cd9b93386842ce272d6fde9ab.zip | |
Merge commit 'origin/master' into for-linus/xen/master
* commit 'origin/master': (4825 commits)
Fix build errors due to CONFIG_BRANCH_TRACER=y
parport: Use the PCI IRQ if offered
tty: jsm cleanups
Adjust path to gpio headers
KGDB_SERIAL_CONSOLE check for module
Change KCONFIG name
tty: Blackin CTS/RTS
Change hardware flow control from poll to interrupt driven
Add support for the MAX3100 SPI UART.
lanana: assign a device name and numbering for MAX3100
serqt: initial clean up pass for tty side
tty: Use the generic RS485 ioctl on CRIS
tty: Correct inline types for tty_driver_kref_get()
splice: fix deadlock in splicing to file
nilfs2: support nanosecond timestamp
nilfs2: introduce secondary super block
nilfs2: simplify handling of active state of segments
nilfs2: mark minor flag for checkpoint created by internal operation
nilfs2: clean up sketch file
nilfs2: super block operations fix endian bug
...
Conflicts:
arch/x86/include/asm/thread_info.h
arch/x86/lguest/boot.c
drivers/xen/manage.c
Diffstat (limited to 'drivers/gpu/drm/radeon/r300_reg.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/r300_reg.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h index ee6f811599a3..bdbc95fa6721 100644 --- a/drivers/gpu/drm/radeon/r300_reg.h +++ b/drivers/gpu/drm/radeon/r300_reg.h @@ -1770,4 +1770,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0 #define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8 +#define R300_SU_REG_DEST 0x42c8 +#define RV530_FG_ZBREG_DEST 0x4be8 +#define R300_ZB_ZPASS_DATA 0x4f58 +#define R300_ZB_ZPASS_ADDR 0x4f5c + #endif /* _R300_REG_H */ |