summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/r600.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2013-06-21 18:33:06 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2013-06-21 18:33:06 +0200
commite61cd5e2e36746e5a4e791b9232aed39bce52ded (patch)
tree9a9ba4b291698f94e00aaedbe6e4c551d7a51f5a /drivers/gpu/drm/radeon/r600.c
parentMerge tag 'acpi-3.10-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/ra... (diff)
parentMerge branch 'drm-fixes-3.10' of git://people.freedesktop.org/~agd5f/linux in... (diff)
downloadlinux-e61cd5e2e36746e5a4e791b9232aed39bce52ded.tar.xz
linux-e61cd5e2e36746e5a4e791b9232aed39bce52ded.zip
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm radeon fixes from Dave Airlie: "One core fix, but mostly radeon fixes for s/r and big endian UVD support, and a fix to stop the GPU being reset for no good reason, and crashing people's machines." * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/radeon: update lockup tracking when scheduling in empty ring drm/prime: Honor requested file flags when exporting a buffer drm/radeon: fix UVD on big endian drm/radeon: fix write back suspend regression with uvd v2 drm/radeon: do not try to uselessly update virtual memory pagetable
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 0e5341695922..6948eb88c2b7 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2687,6 +2687,9 @@ void r600_uvd_rbc_stop(struct radeon_device *rdev)
int r600_uvd_init(struct radeon_device *rdev)
{
int i, j, r;
+ /* disable byte swapping */
+ u32 lmi_swap_cntl = 0;
+ u32 mp_swap_cntl = 0;
/* raise clocks while booting up the VCPU */
radeon_set_uvd_clocks(rdev, 53300, 40000);
@@ -2711,9 +2714,13 @@ int r600_uvd_init(struct radeon_device *rdev)
WREG32(UVD_LMI_CTRL, 0x40 | (1 << 8) | (1 << 13) |
(1 << 21) | (1 << 9) | (1 << 20));
- /* disable byte swapping */
- WREG32(UVD_LMI_SWAP_CNTL, 0);
- WREG32(UVD_MP_SWAP_CNTL, 0);
+#ifdef __BIG_ENDIAN
+ /* swap (8 in 32) RB and IB */
+ lmi_swap_cntl = 0xa;
+ mp_swap_cntl = 0;
+#endif
+ WREG32(UVD_LMI_SWAP_CNTL, lmi_swap_cntl);
+ WREG32(UVD_MP_SWAP_CNTL, mp_swap_cntl);
WREG32(UVD_MPC_SET_MUXA0, 0x40c2040);
WREG32(UVD_MPC_SET_MUXA1, 0x0);