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author | Alex Deucher <alexander.deucher@amd.com> | 2013-01-18 19:53:37 +0100 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2013-01-31 22:24:49 +0100 |
commit | d3cb781e83b39561f717358e95d357e53a0da720 (patch) | |
tree | 35681fcb7b3d1d9c6016600b6078abadbec6f6a6 /drivers/gpu/drm/radeon/r600d.h | |
parent | drm/radeon: add a bios scratch asic hung helper (diff) | |
download | linux-d3cb781e83b39561f717358e95d357e53a0da720.tar.xz linux-d3cb781e83b39561f717358e95d357e53a0da720.zip |
drm/radeon: rework GPU reset on r6xx/r7xx
Update the code to better match the recommended
programming sequence for soft reset.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r600d.h')
-rw-r--r-- | drivers/gpu/drm/radeon/r600d.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index 62423b0eb2b9..494ef768966f 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h @@ -182,6 +182,8 @@ #define CP_COHER_BASE 0x85F8 #define CP_DEBUG 0xC1FC #define R_0086D8_CP_ME_CNTL 0x86D8 +#define S_0086D8_CP_PFP_HALT(x) (((x) & 1)<<26) +#define C_0086D8_CP_PFP_HALT(x) ((x) & 0xFBFFFFFF) #define S_0086D8_CP_ME_HALT(x) (((x) & 1)<<28) #define C_0086D8_CP_ME_HALT(x) ((x) & 0xEFFFFFFF) #define CP_ME_RAM_DATA 0xC160 |