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authorAlex Deucher <alexdeucher@gmail.com>2010-06-04 19:10:12 +0200
committerDave Airlie <airlied@redhat.com>2010-08-02 02:00:05 +0200
commite7aeeba6a8fb86ac52bcffa0b72942f784f2b37f (patch)
tree889d8196e31ec490beba8b801236d7734e8d36bb /drivers/gpu/drm/radeon/radeon.h
parentdrm/radeon/kms: fix CS alignment checking for tiling (v2) (diff)
downloadlinux-e7aeeba6a8fb86ac52bcffa0b72942f784f2b37f.tar.xz
linux-e7aeeba6a8fb86ac52bcffa0b72942f784f2b37f.zip
drm/radeon/kms/r6xx+: add query for tile config (v2)
Userspace needs this information to access tiled buffers via the CPU. v2: rebased on evergreen accel changes Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d4d776d2f1e0..be8420e65f01 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -914,6 +914,7 @@ struct r600_asic {
unsigned tiling_nbanks;
unsigned tiling_npipes;
unsigned tiling_group_size;
+ unsigned tile_config;
struct r100_gpu_lockup lockup;
};
@@ -938,6 +939,7 @@ struct rv770_asic {
unsigned tiling_nbanks;
unsigned tiling_npipes;
unsigned tiling_group_size;
+ unsigned tile_config;
struct r100_gpu_lockup lockup;
};
@@ -963,6 +965,7 @@ struct evergreen_asic {
unsigned tiling_nbanks;
unsigned tiling_npipes;
unsigned tiling_group_size;
+ unsigned tile_config;
};
union radeon_asic_config {