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authorAlex Deucher <alexdeucher@gmail.com>2010-09-29 17:37:40 +0200
committerDave Airlie <airlied@redhat.com>2010-10-06 03:46:24 +0200
commitf28488c282d8916b9b6190cc41714815bbaf97d5 (patch)
tree66c000cb29f4da8317c9e12594691c319094f215 /drivers/gpu/drm/radeon/radeon_mode.h
parentdrm/radeon/kms: prefer high post dividers in legacy pll algo (diff)
downloadlinux-f28488c282d8916b9b6190cc41714815bbaf97d5.tar.xz
linux-f28488c282d8916b9b6190cc41714815bbaf97d5.zip
drm/radeon/kms: remove some pll algo flags
These shouldn't be needed with the post div changes in the last patch. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h14
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 8e071bf5e250..8707cd61e58b 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -139,16 +139,10 @@ struct radeon_tmds_pll {
#define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
#define RADEON_PLL_USE_REF_DIV (1 << 2)
#define RADEON_PLL_LEGACY (1 << 3)
-#define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
-#define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
-#define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
-#define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
-#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
-#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
-#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
-#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
-#define RADEON_PLL_USE_POST_DIV (1 << 12)
-#define RADEON_PLL_IS_LCD (1 << 13)
+#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 4)
+#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 5)
+#define RADEON_PLL_USE_POST_DIV (1 << 6)
+#define RADEON_PLL_IS_LCD (1 << 7)
/* pll algo */
enum radeon_pll_algo {