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| author | Alex Deucher <alexdeucher@gmail.com> | 2011-01-31 22:48:52 +0100 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-02-02 03:49:41 +0100 |
| commit | f523f74eac1897b13c05c88ce6e5de0a7c34578b (patch) | |
| tree | 54c2a3f66eae2c094fb2fe7ed37dbd04ac47f949 /drivers/gpu/drm/radeon/radeon_mode.h | |
| parent | drm/radeon/kms: add pll debugging output (diff) | |
| download | linux-f523f74eac1897b13c05c88ce6e5de0a7c34578b.tar.xz linux-f523f74eac1897b13c05c88ce6e5de0a7c34578b.zip | |
drm/radeon/kms: add new pll algo for avivo asics
Based on the vbios code. This should hopefully
fix the pll problems on a number of avivo asics
once it's enabled.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 12bdeab91c86..6794cdf91f28 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h @@ -149,6 +149,7 @@ struct radeon_tmds_pll { #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) #define RADEON_PLL_USE_POST_DIV (1 << 12) #define RADEON_PLL_IS_LCD (1 << 13) +#define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14) struct radeon_pll { /* reference frequency */ @@ -510,13 +511,21 @@ extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, struct radeon_atom_ss *ss, int id, u32 clock); -extern void radeon_compute_pll(struct radeon_pll *pll, - uint64_t freq, - uint32_t *dot_clock_p, - uint32_t *fb_div_p, - uint32_t *frac_fb_div_p, - uint32_t *ref_div_p, - uint32_t *post_div_p); +extern void radeon_compute_pll_legacy(struct radeon_pll *pll, + uint64_t freq, + uint32_t *dot_clock_p, + uint32_t *fb_div_p, + uint32_t *frac_fb_div_p, + uint32_t *ref_div_p, + uint32_t *post_div_p); + +extern void radeon_compute_pll_avivo(struct radeon_pll *pll, + u32 freq, + u32 *dot_clock_p, + u32 *fb_div_p, + u32 *frac_fb_div_p, + u32 *ref_div_p, + u32 *post_div_p); extern void radeon_setup_encoder_clones(struct drm_device *dev); |