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| author | Kevin Hilman <khilman@linaro.org> | 2014-01-22 01:55:05 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@linaro.org> | 2014-01-22 01:55:17 +0100 |
| commit | 935b0d622f16538d071af823388c21c2e6f66134 (patch) | |
| tree | e076fb718a68241d21a73bb338c8e97175187a7e /drivers/gpu/drm/radeon/si.c | |
| parent | Merge tag 'davinci-for-v3.14/dt' of git://git.kernel.org/pub/scm/linux/kernel... (diff) | |
| parent | clk: bcm281xx: define kona clock binding (diff) | |
| download | linux-935b0d622f16538d071af823388c21c2e6f66134.tar.xz linux-935b0d622f16538d071af823388c21c2e6f66134.zip | |
Merge tag 'bcm-for-3.14-dt' of git://github.com/broadcom/bcm11351 into next/dt
From Christian Daudt:
Add i2c, usb and clock DT configuration to bcm mobile.
* tag 'bcm-for-3.14-dt' of git://github.com/broadcom/bcm11351: (697 commits)
clk: bcm281xx: define kona clock binding
ARM: dts: add usb udc support to bcm281xx
ARM: dts: Specify clocks for timer on bcm11351
Documentation: dt: kona-timer: Add clocks property
ARM: dts: Specify clocks for SDHCIs on bcm11351
Documentation: dt: kona-sdhci: Add clocks property
ARM: dts: Specify clocks for UARTs on bcm11351
ARM: dts: bcm281xx: Add i2c busses
ARM: dts: Declare clocks as fixed on bcm11351
ARM: dts: bcm28155-ap: Enable all the i2c busses
+Linux 3.13-rc5
...
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/si.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 6a64ccaa0695..a36736dab5e0 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c @@ -3882,8 +3882,15 @@ static int si_mc_init(struct radeon_device *rdev) rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); /* size in MB on si */ - rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; - rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; + tmp = RREG32(CONFIG_MEMSIZE); + /* some boards may have garbage in the upper 16 bits */ + if (tmp & 0xffff0000) { + DRM_INFO("Probable bad vram size: 0x%08x\n", tmp); + if (tmp & 0xffff) + tmp &= 0xffff; + } + rdev->mc.mc_vram_size = tmp * 1024ULL * 1024ULL; + rdev->mc.real_vram_size = rdev->mc.mc_vram_size; rdev->mc.visible_vram_size = rdev->mc.aper_size; si_vram_gtt_location(rdev, &rdev->mc); radeon_update_bandwidth_info(rdev); |