diff options
author | Dave Airlie <airlied@redhat.com> | 2023-10-18 08:08:07 +0200 |
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committer | Dave Airlie <airlied@redhat.com> | 2023-10-18 08:08:07 +0200 |
commit | 27442758e9b4e083bef3f164a1739475c01f3202 (patch) | |
tree | 58f4a82f1b9e41c11b6247d8f7b9c3c9b8b52711 /drivers/gpu/drm/radeon | |
parent | Merge tag 'drm-habanalabs-next-2023-10-10' of https://git.kernel.org/pub/scm/... (diff) | |
parent | drm/amdgpu/vkms: fix a possible null pointer dereference (diff) | |
download | linux-27442758e9b4e083bef3f164a1739475c01f3202.tar.xz linux-27442758e9b4e083bef3f164a1739475c01f3202.zip |
Merge tag 'amd-drm-next-6.7-2023-10-13' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-6.7-2023-10-13:
amdgpu:
- DC replay fixes
- Misc code cleanups and spelling fixes
- Documentation updates
- RAS EEPROM Updates
- FRU EEPROM Updates
- IP discovery updates
- SR-IOV fixes
- RAS updates
- DC PQ fixes
- SMU 13.0.6 updates
- GC 11.5 Support
- NBIO 7.11 Support
- GMC 11 Updates
- Reset fixes
- SMU 11.5 Updates
- SMU 13.0 OD support
- Use flexible arrays for bo list handling
- W=1 Fixes
- SubVP fixes
- DPIA fixes
- DCN 3.5 Support
- Devcoredump fixes
- VPE 6.1 support
- VCN 4.0 Updates
- S/G display fixes
- DML fixes
- DML2 Support
- MST fixes
- VRR fixes
- Enable seamless boot in more cases
- Enable content type property for HDMI
- OLED fixes
- Rework and clean up GPUVM TLB flushing
- DC ODM fixes
- DP 2.x fixes
- AGP aperture fixes
- SDMA firmware loading cleanups
- Cyan Skillfish GPU clock counter fix
- GC 11 GART fix
- Cache GPU fault info for userspace queries
- DC cursor check fixes
- eDP fixes
- DC FP handling fixes
- Variable sized array fixes
- SMU 13.0.x fixes
- IB start and size alignment fixes for VCN
- SMU 14 Support
- Suspend and resume sequence rework
- vkms fix
amdkfd:
- GC 11 fixes
- GC 10 fixes
- Doorbell fixes
- CWSR fixes
- SVM fixes
- Clean up GC info enumeration
- Rework memory limit handling
- Coherent memory handling fixes
- Use partial migrations in GPU faults
- TLB flush fixes
- DMA unmap fixes
- GC 9.4.3 fixes
- SQ interrupt fix
- GTT mapping fix
- GC 11.5 Support
radeon:
- Misc code cleanups
- W=1 Fixes
- Fix possible buffer overflow
- Fix possible NULL pointer dereference
UAPI:
- Add EXT_COHERENT memory allocation flags. These allow for system scope atomics.
Proposed userspace: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/88
- Add support for new VPE engine. This is a memory to memory copy engine with advanced scaling, CSC, and color management features
Proposed mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25713
- Add INFO IOCTL interface to query GPU faults
Proposed Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238
Proposed libdrm MR: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/298
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231013175758.1735031-1-alexander.deucher@amd.com
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 7 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/pptable.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_fence.c | 111 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_gem.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ttm.c | 2 |
8 files changed, 59 insertions, 87 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 4f06356d9ce2..f0ae087be914 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -4821,14 +4821,15 @@ restart_ih: break; case 44: /* hdmi */ afmt_idx = src_data; - if (!(afmt_status[afmt_idx] & AFMT_AZ_FORMAT_WTRIG)) - DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); - if (afmt_idx > 5) { DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); break; } + + if (!(afmt_status[afmt_idx] & AFMT_AZ_FORMAT_WTRIG)) + DRM_DEBUG("IH: IH event w/o asserted irq bit?\n"); + afmt_status[afmt_idx] &= ~AFMT_AZ_FORMAT_WTRIG; queue_hdmi = true; DRM_DEBUG("IH: HDMI%d\n", afmt_idx + 1); diff --git a/drivers/gpu/drm/radeon/pptable.h b/drivers/gpu/drm/radeon/pptable.h index 4c2eec49dadc..94947229888b 100644 --- a/drivers/gpu/drm/radeon/pptable.h +++ b/drivers/gpu/drm/radeon/pptable.h @@ -74,7 +74,7 @@ typedef struct _ATOM_PPLIB_THERMALCONTROLLER typedef struct _ATOM_PPLIB_STATE { UCHAR ucNonClockStateIndex; - UCHAR ucClockStateIndices[1]; // variable-sized + UCHAR ucClockStateIndices[]; // variable-sized } ATOM_PPLIB_STATE; diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 8afb03bbce29..3d3d2109dfeb 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h @@ -2215,10 +2215,6 @@ int radeon_gem_pin_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int radeon_gem_unpin_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); -int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int radeon_gem_pread_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data, diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index d2f02c3dfce2..b84b58926106 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c @@ -1119,6 +1119,8 @@ static int radeon_tv_get_modes(struct drm_connector *connector) else { /* only 800x600 is supported right now on pre-avivo chips */ tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false); + if (!tv_mode) + return 0; tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; drm_mode_probed_add(connector, tv_mode); } diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index fa531493b111..7bf08164140e 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -555,8 +555,6 @@ static const struct drm_ioctl_desc radeon_ioctls_kms[] = { DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH), - DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH), DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_RENDER_ALLOW), diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 2749dde5838f..9ebe4a0b9a6c 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c @@ -45,7 +45,6 @@ #include "radeon_trace.h" /* - * Fences * Fences mark an event in the GPUs pipeline and are used * for GPU/CPU synchronization. When the fence is written, * it is expected that all buffers associated with that fence @@ -67,10 +66,10 @@ static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) { struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; + if (likely(rdev->wb.enabled || !drv->scratch_reg)) { - if (drv->cpu_addr) { + if (drv->cpu_addr) *drv->cpu_addr = cpu_to_le32(seq); - } } else { WREG32(drv->scratch_reg, seq); } @@ -91,11 +90,10 @@ static u32 radeon_fence_read(struct radeon_device *rdev, int ring) u32 seq = 0; if (likely(rdev->wb.enabled || !drv->scratch_reg)) { - if (drv->cpu_addr) { + if (drv->cpu_addr) seq = le32_to_cpu(*drv->cpu_addr); - } else { + else seq = lower_32_bits(atomic64_read(&drv->last_seq)); - } } else { seq = RREG32(drv->scratch_reg); } @@ -139,9 +137,9 @@ int radeon_fence_emit(struct radeon_device *rdev, /* we are protected by the ring emission mutex */ *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL); - if ((*fence) == NULL) { + if ((*fence) == NULL) return -ENOMEM; - } + (*fence)->rdev = rdev; (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; (*fence)->ring = ring; @@ -163,7 +161,8 @@ int radeon_fence_emit(struct radeon_device *rdev, * for the fence locking itself, so unlocked variants are used for * fence_signal, and remove_wait_queue. */ -static int radeon_fence_check_signaled(wait_queue_entry_t *wait, unsigned mode, int flags, void *key) +static int radeon_fence_check_signaled(wait_queue_entry_t *wait, + unsigned int mode, int flags, void *key) { struct radeon_fence *fence; u64 seq; @@ -197,7 +196,7 @@ static int radeon_fence_check_signaled(wait_queue_entry_t *wait, unsigned mode, static bool radeon_fence_activity(struct radeon_device *rdev, int ring) { uint64_t seq, last_seq, last_emitted; - unsigned count_loop = 0; + unsigned int count_loop = 0; bool wake = false; /* Note there is a scenario here for an infinite loop but it's @@ -231,9 +230,9 @@ static bool radeon_fence_activity(struct radeon_device *rdev, int ring) seq |= last_emitted & 0xffffffff00000000LL; } - if (seq <= last_seq || seq > last_emitted) { + if (seq <= last_seq || seq > last_emitted) break; - } + /* If we loop over we don't want to return without * checking if a fence is signaled as it means that the * seq we just read is different from the previous on. @@ -296,8 +295,7 @@ static void radeon_fence_check_lockup(struct work_struct *work) else if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) { /* good news we believe it's a lockup */ - dev_warn(rdev->dev, "GPU lockup (current fence id " - "0x%016llx last fence id 0x%016llx on ring %d)\n", + dev_warn(rdev->dev, "GPU lockup (current fence id 0x%016llx last fence id 0x%016llx on ring %d)\n", (uint64_t)atomic64_read(&fence_drv->last_seq), fence_drv->sync_seq[ring], ring); @@ -338,16 +336,16 @@ void radeon_fence_process(struct radeon_device *rdev, int ring) * radeon_fence_signaled(). */ static bool radeon_fence_seq_signaled(struct radeon_device *rdev, - u64 seq, unsigned ring) + u64 seq, unsigned int ring) { - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } + /* poll new last sequence at least once */ radeon_fence_process(rdev, ring); - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } + return false; } @@ -355,20 +353,18 @@ static bool radeon_fence_is_signaled(struct dma_fence *f) { struct radeon_fence *fence = to_radeon_fence(f); struct radeon_device *rdev = fence->rdev; - unsigned ring = fence->ring; + unsigned int ring = fence->ring; u64 seq = fence->seq; - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } if (down_read_trylock(&rdev->exclusive_lock)) { radeon_fence_process(rdev, ring); up_read(&rdev->exclusive_lock); - if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) { + if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) return true; - } } return false; } @@ -451,7 +447,7 @@ bool radeon_fence_signaled(struct radeon_fence *fence) */ static bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq) { - unsigned i; + unsigned int i; for (i = 0; i < RADEON_NUM_RINGS; ++i) { if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) @@ -549,9 +545,8 @@ long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeo seq[fence->ring] = fence->seq; r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, timeout); - if (r <= 0) { + if (r <= 0) return r; - } dma_fence_signal(&fence->base); return r; @@ -571,11 +566,11 @@ long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeo int radeon_fence_wait(struct radeon_fence *fence, bool intr) { long r = radeon_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT); - if (r > 0) { + + if (r > 0) return 0; - } else { + else return r; - } } /** @@ -596,15 +591,14 @@ int radeon_fence_wait_any(struct radeon_device *rdev, bool intr) { uint64_t seq[RADEON_NUM_RINGS]; - unsigned i, num_rings = 0; + unsigned int i, num_rings = 0; long r; for (i = 0; i < RADEON_NUM_RINGS; ++i) { seq[i] = 0; - if (!fences[i]) { + if (!fences[i]) continue; - } seq[i] = fences[i]->seq; ++num_rings; @@ -615,9 +609,9 @@ int radeon_fence_wait_any(struct radeon_device *rdev, return -ENOENT; r = radeon_fence_wait_seq_timeout(rdev, seq, intr, MAX_SCHEDULE_TIMEOUT); - if (r < 0) { + if (r < 0) return r; - } + return 0; } @@ -638,13 +632,16 @@ int radeon_fence_wait_next(struct radeon_device *rdev, int ring) seq[ring] = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL; if (seq[ring] >= rdev->fence_drv[ring].sync_seq[ring]) { - /* nothing to wait for, last_seq is - already the last emited fence */ + /* nothing to wait for, last_seq is already + * the last emited fence + */ return -ENOENT; } + r = radeon_fence_wait_seq_timeout(rdev, seq, false, MAX_SCHEDULE_TIMEOUT); if (r < 0) return r; + return 0; } @@ -704,9 +701,8 @@ void radeon_fence_unref(struct radeon_fence **fence) struct radeon_fence *tmp = *fence; *fence = NULL; - if (tmp) { + if (tmp) dma_fence_put(&tmp->base); - } } /** @@ -719,7 +715,7 @@ void radeon_fence_unref(struct radeon_fence **fence) * Returns the number of emitted fences on the ring. Used by the * dynpm code to ring track activity. */ -unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring) +unsigned int radeon_fence_count_emitted(struct radeon_device *rdev, int ring) { uint64_t emitted; @@ -730,10 +726,10 @@ unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring) emitted = rdev->fence_drv[ring].sync_seq[ring] - atomic64_read(&rdev->fence_drv[ring].last_seq); /* to avoid 32bits warp around */ - if (emitted > 0x10000000) { + if (emitted > 0x10000000) emitted = 0x10000000; - } - return (unsigned)emitted; + + return (unsigned int)emitted; } /** @@ -751,19 +747,16 @@ bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring) { struct radeon_fence_driver *fdrv; - if (!fence) { + if (!fence) return false; - } - if (fence->ring == dst_ring) { + if (fence->ring == dst_ring) return false; - } /* we are protected by the ring mutex */ fdrv = &fence->rdev->fence_drv[dst_ring]; - if (fence->seq <= fdrv->sync_seq[fence->ring]) { + if (fence->seq <= fdrv->sync_seq[fence->ring]) return false; - } return true; } @@ -780,23 +773,21 @@ bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring) void radeon_fence_note_sync(struct radeon_fence *fence, int dst_ring) { struct radeon_fence_driver *dst, *src; - unsigned i; + unsigned int i; - if (!fence) { + if (!fence) return; - } - if (fence->ring == dst_ring) { + if (fence->ring == dst_ring) return; - } /* we are protected by the ring mutex */ src = &fence->rdev->fence_drv[fence->ring]; dst = &fence->rdev->fence_drv[dst_ring]; for (i = 0; i < RADEON_NUM_RINGS; ++i) { - if (i == dst_ring) { + if (i == dst_ring) continue; - } + dst->sync_seq[i] = max(dst->sync_seq[i], src->sync_seq[i]); } } @@ -895,9 +886,8 @@ void radeon_fence_driver_init(struct radeon_device *rdev) int ring; init_waitqueue_head(&rdev->fence_queue); - for (ring = 0; ring < RADEON_NUM_RINGS; ring++) { + for (ring = 0; ring < RADEON_NUM_RINGS; ring++) radeon_fence_driver_init_ring(rdev, ring); - } radeon_debugfs_fence_init(rdev); } @@ -1023,6 +1013,7 @@ static const char *radeon_fence_get_driver_name(struct dma_fence *fence) static const char *radeon_fence_get_timeline_name(struct dma_fence *f) { struct radeon_fence *fence = to_radeon_fence(f); + switch (fence->ring) { case RADEON_RING_TYPE_GFX_INDEX: return "radeon.gfx"; case CAYMAN_RING_TYPE_CP1_INDEX: return "radeon.cp1"; @@ -1032,7 +1023,9 @@ static const char *radeon_fence_get_timeline_name(struct dma_fence *f) case R600_RING_TYPE_UVD_INDEX: return "radeon.uvd"; case TN_RING_TYPE_VCE1_INDEX: return "radeon.vce1"; case TN_RING_TYPE_VCE2_INDEX: return "radeon.vce2"; - default: WARN_ON_ONCE(1); return "radeon.unk"; + default: + WARN_ON_ONCE(1); + return "radeon.unk"; } } diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c index 358d19242f4b..3fec3acdaf28 100644 --- a/drivers/gpu/drm/radeon/radeon_gem.c +++ b/drivers/gpu/drm/radeon/radeon_gem.c @@ -311,22 +311,6 @@ int radeon_gem_info_ioctl(struct drm_device *dev, void *data, return 0; } -int radeon_gem_pread_ioctl(struct drm_device *dev, void *data, - struct drm_file *filp) -{ - /* TODO: implement */ - DRM_ERROR("unimplemented %s\n", __func__); - return -EOPNOTSUPP; -} - -int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data, - struct drm_file *filp) -{ - /* TODO: implement */ - DRM_ERROR("unimplemented %s\n", __func__); - return -EOPNOTSUPP; -} - int radeon_gem_create_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) { diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 4eb83ccc4906..de4e6d78f1e1 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c @@ -197,7 +197,6 @@ static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, { struct ttm_resource *old_mem = bo->resource; struct radeon_device *rdev; - struct radeon_bo *rbo; int r; if (new_mem->mem_type == TTM_PL_TT) { @@ -210,7 +209,6 @@ static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict, if (r) return r; - rbo = container_of(bo, struct radeon_bo, tbo); rdev = radeon_get_rdev(bo->bdev); if (!old_mem || (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL)) { |