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author | Yannick Fertre <yannick.fertre@foss.st.com> | 2021-12-15 22:48:35 +0100 |
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committer | Philippe Cornu <philippe.cornu@foss.st.com> | 2022-01-13 14:06:22 +0100 |
commit | 8f2b5f6dcbdaa507e4c4456e6c1b41691117e1d0 (patch) | |
tree | ab40a5f52ce33e86493763cbfde7157ac3256d25 /drivers/gpu/drm/stm/ltdc.h | |
parent | drm/stm: ltdc: add per plane update support (diff) | |
download | linux-8f2b5f6dcbdaa507e4c4456e6c1b41691117e1d0.tar.xz linux-8f2b5f6dcbdaa507e4c4456e6c1b41691117e1d0.zip |
drm/stm: ltdc: add support of flexible pixel formats
This feature allows the generation of any RGB pixel format.
The list of supported formats is no longer linked to the
register LXPFCR_PF, that the reason why a list of drm formats is
defined for each display controller version.
Signed-off-by: Yannick Fertre <yannick.fertre@foss.st.com>
Acked-by: Philippe Cornu <philippe.cornu@foss.st.com>
Reviewed-by: Philippe Cornu <philippe.cornu@foss.st.com>
Reviewed-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Tested-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Philippe Cornu <philippe.cornu@foss.st.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211215214835.20593-1-yannick.fertre@foss.st.com
Diffstat (limited to '')
-rw-r--r-- | drivers/gpu/drm/stm/ltdc.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/stm/ltdc.h b/drivers/gpu/drm/stm/ltdc.h index 68a5a199e320..adc4f9cf7f95 100644 --- a/drivers/gpu/drm/stm/ltdc.h +++ b/drivers/gpu/drm/stm/ltdc.h @@ -17,7 +17,10 @@ struct ltdc_caps { u32 layer_ofs; /* layer offset for applicable regs */ const u32 *layer_regs; /* layer register offset */ u32 bus_width; /* bus width (32 or 64 bits) */ - const u32 *pix_fmt_hw; /* supported pixel formats */ + const u32 *pix_fmt_hw; /* supported hw pixel formats */ + const u32 *pix_fmt_drm; /* supported drm pixel formats */ + int pix_fmt_nb; /* number of pixel format */ + bool pix_fmt_flex; /* pixel format flexibility supported */ bool non_alpha_only_l1; /* non-native no-alpha formats on layer 1 */ int pad_max_freq_hz; /* max frequency supported by pad */ int nb_irq; /* number of hardware interrupts */ |