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| author | Jernej Skrabec <jernej.skrabec@siol.net> | 2019-05-14 22:43:37 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-05-16 10:44:52 +0200 |
| commit | 831adffb3b7b8df4c8e20b7b00843129fb87a166 (patch) | |
| tree | e4e7f2096d6948381f91ecd1a183444b07b79fa3 /drivers/gpu/drm/sun4i | |
| parent | drm/sun4i: Fix sun8i HDMI PHY clock initialization (diff) | |
| download | linux-831adffb3b7b8df4c8e20b7b00843129fb87a166.tar.xz linux-831adffb3b7b8df4c8e20b7b00843129fb87a166.zip | |
drm/sun4i: Fix sun8i HDMI PHY configuration for > 148.5 MHz
Vendor provided documentation says that EMP bits should be set to 3 for
pixel clocks greater than 148.5 MHz.
Fix that.
Cc: stable@vger.kernel.org # 4.17+
Fixes: 4f86e81748fe ("drm/sun4i: Add support for H3 HDMI PHY variant")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190514204337.11068-3-jernej.skrabec@siol.net
Diffstat (limited to 'drivers/gpu/drm/sun4i')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c index afc6d4a9c20b..43643ad31730 100644 --- a/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c +++ b/drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c @@ -293,7 +293,8 @@ static int sun8i_hdmi_phy_config_h3(struct dw_hdmi *hdmi, SUN8I_HDMI_PHY_ANA_CFG2_REG_BIGSW | SUN8I_HDMI_PHY_ANA_CFG2_REG_SLV(4); ana_cfg3_init |= SUN8I_HDMI_PHY_ANA_CFG3_REG_AMPCK(9) | - SUN8I_HDMI_PHY_ANA_CFG3_REG_AMP(13); + SUN8I_HDMI_PHY_ANA_CFG3_REG_AMP(13) | + SUN8I_HDMI_PHY_ANA_CFG3_REG_EMP(3); } regmap_update_bits(phy->regs, SUN8I_HDMI_PHY_ANA_CFG1_REG, |