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authorThierry Reding <treding@nvidia.com>2015-01-28 14:43:05 +0100
committerThierry Reding <treding@nvidia.com>2015-04-02 18:46:21 +0200
commit42e9ce0523699b3f3383b7c5c0bcc2657a77d0ca (patch)
tree6b12a0c8d1152a7ee3e7b670e9236b311a08a8f6 /drivers/gpu/drm/tegra/dc.h
parentgpu: host1x: Export host1x_syncpt_read() (diff)
downloadlinux-42e9ce0523699b3f3383b7c5c0bcc2657a77d0ca.tar.xz
linux-42e9ce0523699b3f3383b7c5c0bcc2657a77d0ca.zip
drm/tegra: dc: Implement hardware VBLANK counter
The display controller on Tegra can use syncpoints to count VBLANK events. syncpoints are 32-bit unsigned integers, so well suited as VBLANK counters. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.h')
-rw-r--r--drivers/gpu/drm/tegra/dc.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h
index 705c93b00794..55792daabbb5 100644
--- a/drivers/gpu/drm/tegra/dc.h
+++ b/drivers/gpu/drm/tegra/dc.h
@@ -12,6 +12,8 @@
#define DC_CMD_GENERAL_INCR_SYNCPT 0x000
#define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001
+#define SYNCPT_CNTRL_NO_STALL (1 << 8)
+#define SYNCPT_CNTRL_SOFT_RESET (1 << 0)
#define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002
#define DC_CMD_WIN_A_INCR_SYNCPT 0x008
#define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009
@@ -23,6 +25,7 @@
#define DC_CMD_WIN_C_INCR_SYNCPT_CNTRL 0x019
#define DC_CMD_WIN_C_INCR_SYNCPT_ERROR 0x01a
#define DC_CMD_CONT_SYNCPT_VSYNC 0x028
+#define SYNCPT_VSYNC_ENABLE (1 << 8)
#define DC_CMD_DISPLAY_COMMAND_OPTION0 0x031
#define DC_CMD_DISPLAY_COMMAND 0x032
#define DISP_CTRL_MODE_STOP (0 << 5)
@@ -438,8 +441,4 @@
#define DC_WINBUF_BD_UFLOW_STATUS 0xdca
#define DC_WINBUF_CD_UFLOW_STATUS 0xfca
-/* synchronization points */
-#define SYNCPT_VBLANK0 26
-#define SYNCPT_VBLANK1 27
-
#endif /* TEGRA_DC_H */