diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2017-12-20 16:46:10 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-12-21 14:52:38 +0100 |
| commit | f68ba6912bd24088f067da2470880892abc2ac58 (patch) | |
| tree | 0178a29a889f4d36bdd20f368e81a635b7355b9d /drivers/gpu/drm/tegra/dc.h | |
| parent | drm/tegra: Fix non-debugfs builds (diff) | |
| download | linux-f68ba6912bd24088f067da2470880892abc2ac58.tar.xz linux-f68ba6912bd24088f067da2470880892abc2ac58.zip | |
drm/tegra: dc: Link DC1 to DC0 on Tegra20
Hardware reset isn't actually broken on Tegra20, but there is a
dependency on the first display controller to be taken out of reset for
the second to be enabled successfully. Model this dependency using a PM
device link.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
[treding@nvidia.com: minor cleanups, extend commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dc.h')
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index f4568e054a63..e2831e96ea96 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -58,7 +58,7 @@ struct tegra_dc_soc_info { bool supports_blending; unsigned int pitch_align; bool has_powergate; - bool broken_reset; + bool coupled_pm; bool has_nvdisplay; const struct tegra_windowgroup_soc *wgrps; unsigned int num_wgrps; |