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authorThierry Reding <treding@nvidia.com>2021-05-27 20:15:46 +0200
committerThierry Reding <treding@nvidia.com>2021-05-31 14:30:11 +0200
commite16efff4e5f490ce34a8c60d9ae7297dca5eb616 (patch)
tree62b017c665cdbdbeae4f9b286b86af62b92990e6 /drivers/gpu/drm/tegra/plane.h
parentdrm/tegra: Correct DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT (diff)
downloadlinux-e16efff4e5f490ce34a8c60d9ae7297dca5eb616.tar.xz
linux-e16efff4e5f490ce34a8c60d9ae7297dca5eb616.zip
drm/tegra: hub: Fix YUV support
The driver currently exposes several YUV formats but fails to properly program all the registers needed to display such formats. Add the right programming sequences so that overlay windows can be used to accelerate color format conversions in multimedia playback use-cases. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/plane.h')
-rw-r--r--drivers/gpu/drm/tegra/plane.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/tegra/plane.h b/drivers/gpu/drm/tegra/plane.h
index c691dd79b27b..1785c1559c0c 100644
--- a/drivers/gpu/drm/tegra/plane.h
+++ b/drivers/gpu/drm/tegra/plane.h
@@ -74,7 +74,8 @@ int tegra_plane_state_add(struct tegra_plane *plane,
struct drm_plane_state *state);
int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap);
-bool tegra_plane_format_is_yuv(unsigned int format, bool *planar);
+bool tegra_plane_format_is_indexed(unsigned int format);
+bool tegra_plane_format_is_yuv(unsigned int format, bool *planar, unsigned int *bpc);
int tegra_plane_setup_legacy_state(struct tegra_plane *tegra,
struct tegra_plane_state *state);