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author | Thierry Reding <treding@nvidia.com> | 2014-11-21 17:33:33 +0100 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2015-01-27 10:14:43 +0100 |
commit | 62b9e06321a254c3039966cff831487498e831a5 (patch) | |
tree | 0e4de013ce57764aa3058462ed05e54fd6877701 /drivers/gpu/drm/tegra/rgb.c | |
parent | drm/atomic: Add ->atomic_check() to encoder helpers (diff) | |
download | linux-62b9e06321a254c3039966cff831487498e831a5.tar.xz linux-62b9e06321a254c3039966cff831487498e831a5.zip |
drm/tegra: Use tegra_commit_dc() in output drivers
All output drivers have open-coded variants of this function, so export
it to remove some code duplication.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/rgb.c')
-rw-r--r-- | drivers/gpu/drm/tegra/rgb.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c index d6af9be48f42..3b851abbccae 100644 --- a/drivers/gpu/drm/tegra/rgb.c +++ b/drivers/gpu/drm/tegra/rgb.c @@ -123,8 +123,7 @@ static int tegra_output_rgb_enable(struct tegra_output *output) PW4_ENABLE | PM0_ENABLE | PM1_ENABLE; tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_POWER_CONTROL); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); + tegra_dc_commit(rgb->dc); rgb->enabled = true; @@ -148,11 +147,10 @@ static int tegra_output_rgb_disable(struct tegra_output *output) value &= ~DISP_CTRL_MODE_MASK; tegra_dc_writel(rgb->dc, value, DC_CMD_DISPLAY_COMMAND); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); - tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); - tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); + tegra_dc_commit(rgb->dc); + rgb->enabled = false; return 0; |