diff options
| author | Thierry Reding <treding@nvidia.com> | 2015-04-01 14:59:40 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-08-13 13:47:41 +0200 |
| commit | 6ca1f62f0d69120030469cc0b409bd521cbd67cc (patch) | |
| tree | 4bb01f060741d0c3ef9b8440d1a8ae8fb2bfd366 /drivers/gpu/drm/tegra | |
| parent | drm/tegra: dc: Add Tegra210 support (diff) | |
| download | linux-6ca1f62f0d69120030469cc0b409bd521cbd67cc.tar.xz linux-6ca1f62f0d69120030469cc0b409bd521cbd67cc.zip | |
drm/tegra: dc: Implement CRC debugfs interface
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra')
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.c | 22 | ||||
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.h | 5 |
2 files changed, 27 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index f05ec4f0f1b7..e424755dd578 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1571,8 +1571,30 @@ static int tegra_dc_show_regs(struct seq_file *s, void *data) return 0; } +static int tegra_dc_show_crc(struct seq_file *s, void *data) +{ + struct drm_info_node *node = s->private; + struct tegra_dc *dc = node->info_ent->data; + u32 value; + + value = DC_COM_CRC_CONTROL_ACTIVE_DATA | DC_COM_CRC_CONTROL_ENABLE; + tegra_dc_writel(dc, value, DC_COM_CRC_CONTROL); + tegra_dc_commit(dc); + + drm_crtc_wait_one_vblank(&dc->base); + drm_crtc_wait_one_vblank(&dc->base); + + value = tegra_dc_readl(dc, DC_COM_CRC_CHECKSUM); + seq_printf(s, "%08x\n", value); + + tegra_dc_writel(dc, 0, DC_COM_CRC_CONTROL); + + return 0; +} + static struct drm_info_list debugfs_files[] = { { "regs", tegra_dc_show_regs, 0, NULL }, + { "crc", tegra_dc_show_crc, 0, NULL }, }; static int tegra_dc_debugfs_init(struct tegra_dc *dc, struct drm_minor *minor) diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index 55792daabbb5..5edae2653f09 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -86,6 +86,11 @@ #define DC_CMD_REG_ACT_CONTROL 0x043 #define DC_COM_CRC_CONTROL 0x300 +#define DC_COM_CRC_CONTROL_ALWAYS (1 << 3) +#define DC_COM_CRC_CONTROL_FULL_FRAME (0 << 2) +#define DC_COM_CRC_CONTROL_ACTIVE_DATA (1 << 2) +#define DC_COM_CRC_CONTROL_WAIT (1 << 1) +#define DC_COM_CRC_CONTROL_ENABLE (1 << 0) #define DC_COM_CRC_CHECKSUM 0x301 #define DC_COM_PIN_OUTPUT_ENABLE(x) (0x302 + (x)) #define DC_COM_PIN_OUTPUT_POLARITY(x) (0x306 + (x)) |