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authorDave Airlie <airlied@redhat.com>2016-09-28 03:17:26 +0200
committerDave Airlie <airlied@redhat.com>2016-09-28 03:17:26 +0200
commit662d5c957161802e2f26317bfe02108fdb215706 (patch)
tree36ff51fd391095f7d33adcedfeea779e68140e83 /drivers/gpu/drm/tilcdc/tilcdc_crtc.c
parentMerge branch 'sti-drm-next-2016-09-20' of https://github.com/vinceab/linux in... (diff)
parentdrm/tilcdc: fix wrong error handling (diff)
downloadlinux-662d5c957161802e2f26317bfe02108fdb215706.tar.xz
linux-662d5c957161802e2f26317bfe02108fdb215706.zip
Merge tag 'tilcdc-4.9-3.1' of https://github.com/jsarha/linux into drm-next
Second attempt for 3rd drm/tilcdc pull request for v4.9. * tag 'tilcdc-4.9-3.1' of https://github.com/jsarha/linux: drm/tilcdc: fix wrong error handling drm/tilcdc: Return directly after a failed kfree_table_init() in tilcdc_convert_slave_node() drm/tilcdc: Remove "default" from blue-and-red-wiring property binding drm/tilcdc: Fix non static symbol warning drm/tilcdc: mark symbols static where possible drm/tilcdc: add missing header dependencies drm/tilcdc: WARN if CRTC is touched without CRTC lock drm/tilcdc: Take CRTC lock when calling tilcdc_crtc_disable() drm/tilcdc: Remove unnecessary tilcdc_crtc_disable() from tilcdc_unload() drm/tilcdc: Flush flip-work workqueue before drm_flip_work_cleanup() drm/tilcdc: Clean up LCDC functional clock rate setting code drm/tilcdc: Take crtc modeset lock while updating the crtc clock rate
Diffstat (limited to 'drivers/gpu/drm/tilcdc/tilcdc_crtc.c')
-rw-r--r--drivers/gpu/drm/tilcdc/tilcdc_crtc.c91
1 files changed, 59 insertions, 32 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index cb9df104fe5b..52ebe8fc1784 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -20,6 +20,7 @@
#include <drm/drm_crtc.h>
#include <drm/drm_flip_work.h>
#include <drm/drm_plane_helper.h>
+#include <linux/workqueue.h>
#include "tilcdc_drv.h"
#include "tilcdc_regs.h"
@@ -37,6 +38,8 @@ struct tilcdc_crtc {
bool frame_done;
spinlock_t irq_lock;
+ unsigned int lcd_fck_rate;
+
ktime_t last_vblank;
struct drm_framebuffer *curr_fb;
@@ -152,6 +155,8 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
+
if (tilcdc_crtc->enabled)
return;
@@ -176,6 +181,8 @@ void tilcdc_crtc_disable(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev;
struct tilcdc_drm_private *priv = dev->dev_private;
+ WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
+
if (!tilcdc_crtc->enabled)
return;
@@ -227,8 +234,13 @@ static bool tilcdc_crtc_is_on(struct drm_crtc *crtc)
static void tilcdc_crtc_destroy(struct drm_crtc *crtc)
{
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ struct tilcdc_drm_private *priv = crtc->dev->dev_private;
+ drm_modeset_lock_crtc(crtc, NULL);
tilcdc_crtc_disable(crtc);
+ drm_modeset_unlock_crtc(crtc);
+
+ flush_workqueue(priv->wq);
of_node_put(crtc->port);
drm_crtc_cleanup(crtc);
@@ -243,6 +255,8 @@ int tilcdc_crtc_update_fb(struct drm_crtc *crtc,
struct drm_device *dev = crtc->dev;
unsigned long flags;
+ WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
+
if (tilcdc_crtc->event) {
dev_err(dev->dev, "already pending page flip!\n");
return -EBUSY;
@@ -306,6 +320,37 @@ static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc,
return true;
}
+static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
+{
+ struct drm_device *dev = crtc->dev;
+ struct tilcdc_drm_private *priv = dev->dev_private;
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
+ const unsigned clkdiv = 2; /* using a fixed divider of 2 */
+ int ret;
+
+ /* mode.clock is in KHz, set_rate wants parameter in Hz */
+ ret = clk_set_rate(priv->clk, crtc->mode.clock * 1000 * clkdiv);
+ if (ret < 0) {
+ dev_err(dev->dev, "failed to set display clock rate to: %d\n",
+ crtc->mode.clock);
+ return;
+ }
+
+ tilcdc_crtc->lcd_fck_rate = clk_get_rate(priv->clk);
+
+ DBG("lcd_clk=%u, mode clock=%d, div=%u",
+ tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv);
+
+ /* Configure the LCD clock divisor. */
+ tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) |
+ LCDC_RASTER_MODE);
+
+ if (priv->rev == 2)
+ tilcdc_set(dev, LCDC_CLK_ENABLE_REG,
+ LCDC_V2_DMA_CLK_EN | LCDC_V2_LIDD_CLK_EN |
+ LCDC_V2_CORE_CLK_EN);
+}
+
static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
{
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
@@ -316,6 +361,8 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
struct drm_display_mode *mode = &crtc->state->adjusted_mode;
struct drm_framebuffer *fb = crtc->primary->state->fb;
+ WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
+
if (WARN_ON(!info))
return;
@@ -468,7 +515,7 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
set_scanout(crtc, fb);
- tilcdc_crtc_update_clk(crtc);
+ tilcdc_crtc_set_clk(crtc);
crtc->hwmode = crtc->state->adjusted_mode;
}
@@ -637,41 +684,21 @@ void tilcdc_crtc_update_clk(struct drm_crtc *crtc)
{
struct drm_device *dev = crtc->dev;
struct tilcdc_drm_private *priv = dev->dev_private;
- unsigned long lcd_clk;
- const unsigned clkdiv = 2; /* using a fixed divider of 2 */
- int ret;
+ struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
- pm_runtime_get_sync(dev->dev);
+ drm_modeset_lock_crtc(crtc, NULL);
+ if (tilcdc_crtc->lcd_fck_rate != clk_get_rate(priv->clk)) {
+ if (tilcdc_crtc_is_on(crtc)) {
+ pm_runtime_get_sync(dev->dev);
+ tilcdc_crtc_disable(crtc);
- tilcdc_crtc_disable(crtc);
+ tilcdc_crtc_set_clk(crtc);
- /* mode.clock is in KHz, set_rate wants parameter in Hz */
- ret = clk_set_rate(priv->clk, crtc->mode.clock * 1000 * clkdiv);
- if (ret < 0) {
- dev_err(dev->dev, "failed to set display clock rate to: %d\n",
- crtc->mode.clock);
- goto out;
+ tilcdc_crtc_enable(crtc);
+ pm_runtime_put_sync(dev->dev);
+ }
}
-
- lcd_clk = clk_get_rate(priv->clk);
-
- DBG("lcd_clk=%lu, mode clock=%d, div=%u",
- lcd_clk, crtc->mode.clock, clkdiv);
-
- /* Configure the LCD clock divisor. */
- tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) |
- LCDC_RASTER_MODE);
-
- if (priv->rev == 2)
- tilcdc_set(dev, LCDC_CLK_ENABLE_REG,
- LCDC_V2_DMA_CLK_EN | LCDC_V2_LIDD_CLK_EN |
- LCDC_V2_CORE_CLK_EN);
-
- if (tilcdc_crtc_is_on(crtc))
- tilcdc_crtc_enable(crtc);
-
-out:
- pm_runtime_put_sync(dev->dev);
+ drm_modeset_unlock_crtc(crtc);
}
#define SYNC_LOST_COUNT_LIMIT 50