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authorChristian König <christian.koenig@amd.com>2021-02-10 14:24:27 +0100
committerChristian König <christian.koenig@amd.com>2021-02-11 09:35:19 +0100
commit811ee9dff58072742644da2c07641728f5e078e4 (patch)
tree0289f4b7a313e23113b5729bcbcf792afd5ab5a2 /drivers/gpu/drm/ttm/ttm_pool.c
parentdrm/sun4i: dw-hdmi: Fix max. frequency for H6 (diff)
downloadlinux-811ee9dff58072742644da2c07641728f5e078e4.tar.xz
linux-811ee9dff58072742644da2c07641728f5e078e4.zip
drm/ttm: make sure pool pages are cleared
The old implementation wasn't consistend on this. But it looks like we depend on this so better bring it back. Signed-off-by: Christian König <christian.koenig@amd.com> Reported-and-tested-by: Mike Galbraith <efault@gmx.de> Fixes: d099fc8f540a ("drm/ttm: new TT backend allocation pool v3") Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20210210160549.1462-1-christian.koenig@amd.com
Diffstat (limited to '')
-rw-r--r--drivers/gpu/drm/ttm/ttm_pool.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c
index 74bf1c84b637..6e27cb1bf48b 100644
--- a/drivers/gpu/drm/ttm/ttm_pool.c
+++ b/drivers/gpu/drm/ttm/ttm_pool.c
@@ -33,6 +33,7 @@
#include <linux/module.h>
#include <linux/dma-mapping.h>
+#include <linux/highmem.h>
#ifdef CONFIG_X86
#include <asm/set_memory.h>
@@ -218,6 +219,15 @@ static void ttm_pool_unmap(struct ttm_pool *pool, dma_addr_t dma_addr,
/* Give pages into a specific pool_type */
static void ttm_pool_type_give(struct ttm_pool_type *pt, struct page *p)
{
+ unsigned int i, num_pages = 1 << pt->order;
+
+ for (i = 0; i < num_pages; ++i) {
+ if (PageHighMem(p))
+ clear_highpage(p + i);
+ else
+ clear_page(page_address(p + i));
+ }
+
spin_lock(&pt->lock);
list_add(&p->lru, &pt->pages);
spin_unlock(&pt->lock);