diff options
| author | Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> | 2023-10-09 22:10:27 +0200 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-21 17:45:26 +0100 |
| commit | 0d97ecce16bd26a1f90022cf0466ff15c4a0bd91 (patch) | |
| tree | 54054df933f7fa114dc31f3f72b1b84ea73da897 /drivers/gpu/drm/xe/xe_gt.c | |
| parent | drm/xe/xe2: Add workaround 18032095049 and 16021639441 (diff) | |
| download | linux-0d97ecce16bd26a1f90022cf0466ff15c4a0bd91.tar.xz linux-0d97ecce16bd26a1f90022cf0466ff15c4a0bd91.zip | |
drm/xe: Enable Fixed CCS mode setting
Disable dynamic HW load balancing of compute resource assignment
to engines and instead enabled fixed mode of mapping compute
resources to engines on all platforms with more than one compute
engine.
By default enable only one CCS engine with all compute slices
assigned to it. This is the desired configuration for common
workloads.
PVC platform supports only the fixed CCS mode (workaround 16016805146).
v2: Rebase, make it platform agnostic
v3: Minor code refactoring
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu/drm/xe/xe_gt.c')
| -rw-r--r-- | drivers/gpu/drm/xe/xe_gt.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c index a9c71da985d3..93fccbb4f2ad 100644 --- a/drivers/gpu/drm/xe/xe_gt.c +++ b/drivers/gpu/drm/xe/xe_gt.c @@ -22,6 +22,7 @@ #include "xe_force_wake.h" #include "xe_ggtt.h" #include "xe_gsc.h" +#include "xe_gt_ccs_mode.h" #include "xe_gt_clock.h" #include "xe_gt_idle.h" #include "xe_gt_mcr.h" @@ -450,6 +451,12 @@ static int all_fw_domain_init(struct xe_gt *gt) if (err) goto err_force_wake; + /* Configure default CCS mode of 1 engine with all resources */ + if (xe_gt_ccs_mode_enabled(gt)) { + gt->ccs_mode = 1; + xe_gt_apply_ccs_mode(gt); + } + err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL); XE_WARN_ON(err); xe_device_mem_access_put(gt_to_xe(gt)); @@ -560,6 +567,9 @@ static int do_gt_restart(struct xe_gt *gt) xe_reg_sr_apply_whitelist(hwe); } + /* Get CCS mode in sync between sw/hw */ + xe_gt_apply_ccs_mode(gt); + return 0; } |