diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-10-08 19:35:55 +0200 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-19 10:16:44 +0200 |
| commit | 736085bcf91720fd90175c288c542c721c281bb0 (patch) | |
| tree | 893e59a82d08e777bf502a904dfb46dd983a8fd9 /drivers/gpu/drm | |
| parent | drm/i915: Fix oops on HWS unload (diff) | |
| download | linux-736085bcf91720fd90175c288c542c721c281bb0.tar.xz linux-736085bcf91720fd90175c288c542c721c281bb0.zip | |
drm/i915/dp: down the DP link even if the reg indicates it's already down
Since the PLL may still be on, and the training pattern may not be
correct. Fixes suspend/resume on my PCH eDP test system.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[ickle: minor merge conflict and silence the compiler]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 128c2fefd541..350c541e8e6c 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -914,8 +914,6 @@ static void intel_dp_prepare(struct drm_encoder *encoder) { struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct drm_device *dev = encoder->dev; - struct drm_i915_private *dev_priv = dev->dev_private; - uint32_t dp_reg = I915_READ(intel_dp->output_reg); if (is_edp(intel_dp)) { ironlake_edp_backlight_off(dev); @@ -925,8 +923,7 @@ static void intel_dp_prepare(struct drm_encoder *encoder) else ironlake_edp_pll_off(encoder); } - if (dp_reg & DP_PORT_EN) - intel_dp_link_down(intel_dp); + intel_dp_link_down(intel_dp); } static void intel_dp_commit(struct drm_encoder *encoder) @@ -956,21 +953,20 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) if (mode != DRM_MODE_DPMS_ON) { if (is_edp(intel_dp)) ironlake_edp_backlight_off(dev); - if (dp_reg & DP_PORT_EN) - intel_dp_link_down(intel_dp); + intel_dp_link_down(intel_dp); if (is_edp(intel_dp)) ironlake_edp_panel_off(dev); if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) ironlake_edp_pll_off(encoder); } else { + if (is_edp(intel_dp)) + ironlake_edp_panel_on(intel_dp); if (!(dp_reg & DP_PORT_EN)) { - if (is_edp(intel_dp)) - ironlake_edp_panel_on(intel_dp); intel_dp_start_link_train(intel_dp); intel_dp_complete_link_train(intel_dp); - if (is_edp(intel_dp)) - ironlake_edp_backlight_on(dev); } + if (is_edp(intel_dp)) + ironlake_edp_backlight_on(dev); } intel_dp->dpms_mode = mode; } |