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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-06-28 01:03:56 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-07-11 15:58:33 +0200
commitca2aed6cec9ed3a11a95771d8ef4265247031157 (patch)
treeacbcbded3bf95c972f7b7057d214dd62c3336e44 /drivers/gpu/drm
parentdrm/i915: Make the RPS interrupt generation mask handle the vlv wa (diff)
downloadlinux-ca2aed6cec9ed3a11a95771d8ef4265247031157.tar.xz
linux-ca2aed6cec9ed3a11a95771d8ef4265247031157.zip
drm/i915: Don't disable PPGTT for CHV based in PCI rev
In commit 62942ed7279d3e06dc15ae3d47665eff3b373327 Author: Jesse Barnes <jbarnes@virtuousgeek.org> Date: Fri Jun 13 09:28:33 2014 -0700 drm/i915/vlv: disable PPGTT on early revs v3 we forgot about CHV. IS_VALLEYVIEW() is true for CHV, so we need to explicitly avoid disabling PPGTT on CHV. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Deepak S <deepak.s@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index a4153eef48c2..5188936bca0a 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -64,7 +64,8 @@ static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt)
#endif
/* Early VLV doesn't have this */
- if (IS_VALLEYVIEW(dev) && dev->pdev->revision < 0xb) {
+ if (IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) &&
+ dev->pdev->revision < 0xb) {
DRM_DEBUG_DRIVER("disabling PPGTT on pre-B3 step VLV\n");
return 0;
}